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Re: [Qemu-devel] QEMU ARM SMP: IPI delivery delayed until next main loop


From: Peter Maydell
Subject: Re: [Qemu-devel] QEMU ARM SMP: IPI delivery delayed until next main loop event // how to improve IPI latency?
Date: Thu, 25 Jun 2015 18:13:31 +0100

On 23 June 2015 at 19:15, Peter Maydell <address@hidden> wrote:
> On 23 June 2015 at 08:31, Frederic Konrad <address@hidden> wrote:
>> The normal boot with "-smp 4" and a smp 4 guest is slow and become a lot
>> faster
>> when I enable the window (which have timer callbacks and refresh the screen
>> regularly)
>
> Is it just overall slow, or does it appear to hang? I have an
> interesting effect where *with* this patch an -smp 3 or 4 guest
> boot seems to hang between "SCSI subsystem initialized" and
> "Switched to clocksource arch_sys_counter"...

At least part of what is happening here seems to be that we're
falling into a similar flavour of stall to the original test case:
in the SMP 3 setup, CPU #2 is in the busy-loop of Linux's
multi_cpu_stop() function, and it can sit in that loop for an entire
second. We should never let a single CPU grab execution for that
long when doing TCG round-robin...

-- PMM



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