Re: [Qemu-devel] [PATCH for-2.4] hw/intc/arm_gic_common.c: Reset all registers

[Peter Maydell]

On 29 June 2015 at 19:25, Peter Maydell <address@hidden> wrote:
> The arm_gic_common reset function was missing reset code for
> several of the GIC's state fields:
>  * bpr[]
>  * abpr[]
>  * priority1[]
>  * priority2[]
>  * sgi_pending[]
>  * irq_target[] (SMP configurations only)
>
> These probably went unnoticed because most guests will either
> never touch them, or will write to them in the process of
> configuring the GIC before enabling interrupts.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> The reason for using loops to set these array elements to 0 rather
> than using memset() is that to support "directly boot a kernel in
> NS on a TZ-aware GIC and CPU" we need to support resetting the
> priority registers (most notably the CPU priority mask) to 0x80
> rather than 0.
>
> I found this via code review rather than because it triggered
> any kind of misbehaviour.
>
> last_active[] does not need any reset, I believe.
>
>  hw/intc/arm_gic_common.c | 21 ++++++++++++++++++---
>  1 file changed, 18 insertions(+), 3 deletions(-)

I'd like to get this in before hardfreeze, ideally, so if
anybody has time to review it on Monday that would be great.

thanks
-- PMM