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Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction transla
From: |
Andreas Tobler |
Subject: |
Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation |
Date: |
Mon, 14 Dec 2015 23:09:57 +0100 |
User-agent: |
Mozilla/5.0 (Macintosh; Intel Mac OS X 10.11; rv:38.0) Gecko/20100101 Thunderbird/38.4.0 |
Alvise,
On 14.12.15 09:41, Alvise Rigo wrote:
This is the sixth iteration of the patch series which applies to the
upstream branch of QEMU (v2.5.0-rc3).
Changes versus previous versions are at the bottom of this cover letter.
The code is also available at following repository:
https://git.virtualopensystems.com/dev/qemu-mt.git
branch:
slowpath-for-atomic-v6-no-mttcg
Thank you very much for this work. I tried to rebase myself, but it was
over my head.
I'm looking for a qemu solution where I can use my cores.
My use case is doing gcc porting for aarch64-*-freebsd*. I think it
doesn't matter which OS. This arch has not enough real affordable HW
solutions on the market yet. So I was looking for your solution. Claudio
gave me a hint about it.
Your recent merge/rebase only covers arm itself, not aarch64, right?
Linking fails with unreferenced cpu_exclusive_addr stuff in
target-arm/translate-a64.c
Are you working on this already? Or Claudio?
This work has been sponsored by Huawei Technologies Duesseldorf GmbH.
...
Thank you!
Andreas
- [Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MMIO code, (continued)
Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation,
Andreas Tobler <=
Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation, Alex Bennée, 2015/12/17