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[Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper |
Date: |
Tue, 8 Mar 2016 13:06:46 -0800 |
From: Peter Crosthwaite <address@hidden>
Add a helper that will scan a static RegisterAccessInfo Array
and populate a container MemoryRegion with registers as defined.
Signed-off-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
---
V3:
- Fix typo
V2:
- Use memory_region_add_subregion_no_print()
hw/core/register.c | 39 +++++++++++++++++++++++++++++++++++++++
include/hw/register.h | 20 ++++++++++++++++++++
2 files changed, 59 insertions(+)
diff --git a/hw/core/register.c b/hw/core/register.c
index 28f3776..5db8f62 100644
--- a/hw/core/register.c
+++ b/hw/core/register.c
@@ -228,6 +228,45 @@ uint64_t register_read_memory_le(void *opaque, hwaddr
addr, unsigned size)
return register_read_memory(opaque, addr, size, false);
}
+void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
+ int num, RegisterInfo *ri, uint32_t *data,
+ MemoryRegion *container, const MemoryRegionOps *ops,
+ bool debug_enabled, uint64_t memory_size)
+{
+ const char *device_prefix = object_get_typename(OBJECT(owner));
+ RegisterInfoArray *r_array = g_malloc(sizeof(RegisterInfoArray));
+ int i;
+
+ r_array->num_elements = 0;
+ r_array->r = g_malloc_n(num, sizeof(RegisterInfo *));
+
+ for (i = 0; i < num; i++) {
+ int index = rae[i].decode.addr / 4;
+ RegisterInfo *r = &ri[index];
+
+ *r = (RegisterInfo) {
+ .data = &data[index],
+ .data_size = sizeof(uint32_t),
+ .access = &rae[i],
+ .debug = debug_enabled,
+ .prefix = device_prefix,
+ .opaque = owner,
+ };
+ register_init(r);
+
+ r_array->r[r_array->num_elements] = r;
+ r_array->num_elements++;
+ }
+
+ r_array->num_elements--;
+
+ memory_region_init_io(&r_array->mem, OBJECT(owner), ops, r_array,
+ device_prefix, memory_size);
+ memory_region_add_subregion(container,
+ r_array->r[0]->access->decode.addr,
+ &r_array->mem);
+}
+
static const TypeInfo register_info = {
.name = TYPE_REGISTER,
.parent = TYPE_DEVICE,
diff --git a/include/hw/register.h b/include/hw/register.h
index d732f55..00df7d5 100644
--- a/include/hw/register.h
+++ b/include/hw/register.h
@@ -176,6 +176,26 @@ void register_write_memory_le(void *opaque, hwaddr addr,
uint64_t value,
uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size);
uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size);
+/**
+ * Init a block of consecutive registers into a container MemoryRegion. A
+ * number of constant register definitions are parsed to create a corresponding
+ * array of RegisterInfo's.
+ *
+ * @owner: device owning the registers
+ * @rae: Register definitions to init
+ * @num: number of registers to init (length of @rae)
+ * @ri: Register array to init
+ * @data: Array to use for register data
+ * @container: Memory region to contain new registers
+ * @ops: Memory region ops to access registers.
+ * @debug enabled: turn on/off verbose debug information
+ */
+
+void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae,
+ int num, RegisterInfo *ri, uint32_t *data,
+ MemoryRegion *container, const MemoryRegionOps *ops,
+ bool debug_enabled, uint64_t memory_size);
+
/* Define constants for a 32 bit register */
#define REG32(reg, addr) \
enum { A_ ## reg = (addr) }; \
--
2.5.0
- [Qemu-devel] [PATCH v5 02/15] register: Add Register API, (continued)
- [Qemu-devel] [PATCH v5 02/15] register: Add Register API, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 03/15] register: Add Memory API glue, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 04/15] register: Add support for decoding information, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 05/15] register: Define REG and FIELD macros, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 06/15] register: QOMify, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 07/15] register: Add block initialise helper,
Alistair Francis <=
- [Qemu-devel] [PATCH v5 08/15] dma: Add Xilinx Zynq devcfg device model, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 09/15] xilinx_zynq: Connect devcfg to the Zynq machine model, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 10/15] qdev: Define qdev_get_gpio_out, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 14/15] misc: Introduce ZynqMP IOU SLCR, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 12/15] irq: Add opaque setter routine, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 13/15] register: Add GPIO API, Alistair Francis, 2016/03/08
- [Qemu-devel] [PATCH v5 11/15] qdev: Add qdev_pass_all_gpios API, Alistair Francis, 2016/03/08
- Re: [Qemu-devel] [PATCH v5 00/15] data-driven device registers, Alex Bennée, 2016/03/22