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Re: [Qemu-devel] [PATCH v3 11/12] i.MX: Add i.MX6 SOC implementation.
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3 11/12] i.MX: Add i.MX6 SOC implementation. |
Date: |
Thu, 10 Mar 2016 17:33:39 +0700 |
On 2 March 2016 at 05:27, Jean-Christophe Dubois <address@hidden> wrote:
> For now we only support the following devices:
> * up to 4 Cortex A9 cores
> * A9 MPCORE (SCU, GIC, TWD)
> * 5 i.MX UARTs
> * 2 EPIT timers
> * 1 GPT timer
> * 3 I2C controllers
> * 7 GPIO controllers
> * 6 SDHC controllers
> * 5 SPI controllers
> * 1 CCM device
> * 1 SRC device
> * various ROM/RAM areas.
>
> Signed-off-by: Jean-Christophe Dubois <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v3 10/12] i.MX: Add the Freescale SPI Controller, (continued)
[Qemu-devel] [PATCH v3 12/12] i.MX: Add sabrelite i.MX6 emulation., Jean-Christophe Dubois, 2016/03/01
[Qemu-devel] [PATCH v3 11/12] i.MX: Add i.MX6 SOC implementation., Jean-Christophe Dubois, 2016/03/01
- Re: [Qemu-devel] [PATCH v3 11/12] i.MX: Add i.MX6 SOC implementation.,
Peter Maydell <=
Re: [Qemu-devel] [PATCH v3 00/12] Add i.MX6 (Single/Dual/Quad) support, Peter Maydell, 2016/03/16