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Re: [Qemu-devel] [PATCH 08/17] ppc: Add placeholder SPRs for DPDES and D
From: |
Thomas Huth |
Subject: |
Re: [Qemu-devel] [PATCH 08/17] ppc: Add placeholder SPRs for DPDES and DHDES on P8 |
Date: |
Mon, 14 Mar 2016 20:32:45 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 |
On 14.03.2016 17:56, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <address@hidden>
>
> We still need to eventually implement doorbells but at least this
> makes us not crash when the SPRs are accessed.
>
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> ---
> target-ppc/cpu.h | 2 ++
> target-ppc/translate_init.c | 17 +++++++++++++++++
> 2 files changed, 19 insertions(+)
>
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 02aed6427ade..779cb57bd700 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -1394,6 +1394,8 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
> ifetch)
> #define SPR_MPC_ICTRL (0x09E)
> #define SPR_MPC_BAR (0x09F)
> #define SPR_PSPB (0x09F)
> +#define SPR_DHDES (0x0B1)
> +#define SPR_DPDES (0x0B0)
> #define SPR_DAWR (0x0B4)
> #define SPR_RPR (0x0BA)
> #define SPR_DAWRX (0x0BC)
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 59a68de0bce8..7a399b97bc6f 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -8036,6 +8036,22 @@ static void gen_spr_power8_rpr(CPUPPCState *env)
> #endif
> }
>
> +static void gen_spr_power8_dbell(CPUPPCState *env)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> + spr_register_hv(env, SPR_DPDES, "DPDES",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0);
> + spr_register_hv(env, SPR_DHDES, "DHDES",
> + SPR_NOACCESS, SPR_NOACCESS,
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0);
> +#endif
> +}
> +
> static void init_proc_book3s_64(CPUPPCState *env, int version)
> {
> gen_spr_ne_601(env);
> @@ -8089,6 +8105,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int
> version)
> gen_spr_power8_pspb(env);
> gen_spr_vtb(env);
> gen_spr_power8_rpr(env);
> + gen_spr_power8_dbell(env);
> }
> if (version < BOOK3S_CPU_POWER8) {
> gen_spr_book3s_dbg(env);
>
Reviewed-by: Thomas Huth <address@hidden>
- Re: [Qemu-devel] [PATCH 03/17] ppc: Add a bunch of hypervisor SPRs to Book3s, (continued)
[Qemu-devel] [PATCH 05/17] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV, Cédric Le Goater, 2016/03/14
[Qemu-devel] [PATCH 16/17] ppc: Add dummy CIABR SPR, Cédric Le Goater, 2016/03/14
[Qemu-devel] [PATCH 08/17] ppc: Add placeholder SPRs for DPDES and DHDES on P8, Cédric Le Goater, 2016/03/14
[Qemu-devel] [PATCH 09/17] ppc: SPURR & PURR are HV writeable and privileged, Cédric Le Goater, 2016/03/14
[Qemu-devel] [PATCH 14/17] ppc: Add dummy write to VTB, Cédric Le Goater, 2016/03/14
[Qemu-devel] [PATCH 15/17] ppc: Add dummy POWER8 MPPR register, Cédric Le Goater, 2016/03/14