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Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing |
Date: |
Tue, 15 Mar 2016 09:11:31 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.6.0 |
On 03/15/2016 01:39 AM, David Gibson wrote:
> On Mon, Mar 14, 2016 at 05:56:23PM +0100, Cédric Le Goater wrote:
>> Hello,
>>
>> This is a first mini-serie of patches adding support for new ppc SPRs.
>> They were taken from Ben's larger patchset adding the ppc powernv
>> platform and they should already be useful for the pseries guest
>> migration.
>>
>> Initial patches come from :
>>
>> https://github.com/ozbenh/qemu/commits/powernv
>>
>> The changes are mostly due to the rebase on Dave's 2.6 branch:
>>
>> https://github.com/dgibson/qemu/commits/ppc-for-2.6
>>
>> A couple more are bisect and checkpatch fixes and finally some patches
>> were merge to reduce the noise.
>>
>>
>>
>> The patchset is also available here:
>>
>> https://github.com/legoater/qemu/commits/for-2.6
>>
>> It was quickly tested with a pseries guest using KVM and TCG.
>
> Hmm.. do these all fix bugs with migration, or only some of them?
Probably only some.
Initially, Thomas gave a shorter list which I expanded to a larger one
because of dependencies between patches and I didn't want to change too
much what Ben had sent. You had also reviewed a few.
> The relevance is that things to fix migration should go into 2.6, but
> preparation work for powernv that doesn't fix bug shouldn't really be
> going in now, after the soft freeze and will need to wait for 2.7.
OK. I will rework and keep the rest for 2.7.
Thomas, thanks for the review. I have identified a few things I need
to work on but may be, the patchset is still too large for 2.6 ?
Full list is below.
Thanks,
C.
>> Benjamin Herrenschmidt (17):
>> ppc: Update SPR definitions
>> ppc: Add macros to register hypervisor mode SPRs
>> ppc: Add a bunch of hypervisor SPRs to Book3s
>> ppc: Add number of threads per core to the processor definition
>> ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV
>> ppc: Create cpu_ppc_set_papr() helper
>> ppc: Better figure out if processor has HV mode
>> ppc: Add placeholder SPRs for DPDES and DHDES on P8
>> ppc: SPURR & PURR are HV writeable and privileged
>> ppc: Add dummy SPR_IC for POWER8
>> ppc: Initialize AMOR in PAPR mode
>> ppc: Fix writing to AMR/UAMOR
>> ppc: Add POWER8 IAMR register
>> ppc: Add dummy write to VTB
>> ppc: Add dummy POWER8 MPPR register
>> ppc: Add dummy CIABR SPR
>> ppc: A couple more dummy POWER8 Book4 regs
>>
>> hw/ppc/spapr.c | 11 +-
>> target-ppc/cpu-qom.h | 1 +
>> target-ppc/cpu.h | 68 ++++++-
>> target-ppc/excp_helper.c | 8 +-
>> target-ppc/helper_regs.h | 4 +-
>> target-ppc/translate.c | 30 +--
>> target-ppc/translate_init.c | 461
>> ++++++++++++++++++++++++++++++++++++++++----
>> 7 files changed, 510 insertions(+), 73 deletions(-)
>>
>
- Re: [Qemu-devel] [PATCH 12/17] ppc: Fix writing to AMR/UAMOR, (continued)
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing, David Gibson, 2016/03/14
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing,
Cédric Le Goater <=
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing, David Gibson, 2016/03/15
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing, Cédric Le Goater, 2016/03/16
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing, David Gibson, 2016/03/16
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing, Cédric Le Goater, 2016/03/17
- Re: [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing, David Gibson, 2016/03/20