[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 08/11] hw/mips_malta: remove redundant irq and cl
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PATCH v2 08/11] hw/mips_malta: remove redundant irq and clock init |
Date: |
Tue, 15 Mar 2016 09:59:33 +0000 |
Global smp_cpus is never zero (even if user provides -smp 0), thus clocks
and irqs are always initialized for each created CPU in the loop at the
beginning of mips_malta_init.
These two lines cause a leak of already allocated timer and irqs for the
first CPU - remove them.
Signed-off-by: Leon Alrae <address@hidden>
---
hw/mips/mips_malta.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index cbfdb78..b70948d 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1133,10 +1133,6 @@ void mips_malta_init(MachineState *machine)
/* Board ID = 0x420 (Malta Board with CoreLV) */
stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
- /* Init internal devices */
- cpu_mips_irq_init_cpu(env);
- cpu_mips_clock_init(env);
-
/*
* We have a circular dependency problem: pci_bus depends on isa_irq,
* isa_irq is provided by i8259, i8259 depends on ISA, ISA depends
--
2.1.0
- [Qemu-devel] [PATCH v2 00/11] hw/mips: implement Cluster Power Controller, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 01/11] hw/mips: implement generic MIPS Coherent Processing System container, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 02/11] target-mips: add CMGCRBase register, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 03/11] hw/mips: add initial Global Config Register support, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 05/11] hw/mips: add initial Cluster Power Controller support, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 04/11] hw/mips/cps: create GCR block inside CPS, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 06/11] hw/mips/cps: create CPC block inside CPS, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 07/11] hw/mips_malta: remove CPUMIPSState from the write_bootloader(), Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 08/11] hw/mips_malta: remove redundant irq and clock init,
Leon Alrae <=
- [Qemu-devel] [PATCH v2 10/11] hw/mips_malta: add CPS to Malta board, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 09/11] hw/mips_malta: move CPU creation to a separate function, Leon Alrae, 2016/03/15
- [Qemu-devel] [PATCH v2 11/11] target-mips: enable CM GCR in MIPS64R6-generic CPU, Leon Alrae, 2016/03/15