|
From: | Jean-Christophe DUBOIS |
Subject: | Re: [Qemu-devel] [PATCH v3 12/12] i.MX: Add sabrelite i.MX6 emulation. |
Date: | Tue, 15 Mar 2016 22:40:07 +0100 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 |
Le 11/03/2016 00:57, Peter Maydell a écrit :
On 11 March 2016 at 02:24, Jean-Christophe DUBOIS <address@hidden> wrote:Le 10/03/2016 11:38, Peter Maydell a écrit :On 2 March 2016 at 05:27, Jean-Christophe Dubois <address@hidden> wrote:The sabrelite supports one SPI FLASH memory on SPI1 Signed-off-by: Jean-Christophe Dubois <address@hidden> --- + + { + /* Add the sst25vf016b NOR FLASH memory to first SPI */ + Object *spi_dev; + + spi_dev = object_resolve_path_component(OBJECT(&s->soc), "spi1"); + if (spi_dev) { + SSIBus *spi_bus; + + spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(spi_dev), "spi");This looks odd. You should just be able to do spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), "spi1"); without using object_resolve_path_component() to try to find an SPI device object, because your SoC device should have alias properties which provide access to its SPI subcomponents' SPI buses. See hw/arm/xlnx-ep108.c for an example of the board code for this and hw/arm/xlnx-zynqmp.c for the SoC code which calls object_property_add_alias() to set up the aliases.I certainly could do as you proposed. The problem is that I also need the spi_dev device for the sysbus_connect_irq() call below. My spi_dev is referenced as "spi1" in the i.MX6 doc and I added a 'spi1" property for it in the i.MX6 soc. Once I have the spi_dev device it is trivial to retrieve the spi_bus attached to it. So, yes this is not in line with what is done in xlnx-zynqmp.c but the need is a bit different.I think the SoC should probably have an externally-facing IRQ line which it wires up internally to the SPI's IRQ line. (This corresponds basically to what happens in h/w -- the SoC's interfaces are defined by it even though many of them may be directly wired up to some internal component it has, but from outside the SoC you don't get access to the whole of the internal component.)
Well, each SPI controller has 4 possible CS lines to external devices and I have 5 SPI controllers.
This makes 20 externally facing IRQ lines (these are output lines) to add to the i.MX6 soc object as properties (with a meaningful naming convention).
And anyway, what I need to pass to sysbus_connect_irq() is a SYS_BUS_DEVICE and not an IRQ line ...
So do you mean I should define the 20 external lines (properties) and wire all of them up with sysbus_connect_irq() in the i.MX6 SOC implementation (fsl-imx6.c)?
Then How to you "connect" this externally facing line to the selected device CS line (here a FLASH memory) in sabrelite?
JC
thanks -- PMM
[Prev in Thread] | Current Thread | [Next in Thread] |