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[Qemu-devel] [PULL 01/16] ppc: Define the PSPB register on POWER8
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 01/16] ppc: Define the PSPB register on POWER8 |
Date: |
Wed, 16 Mar 2016 16:06:53 +1100 |
From: Thomas Huth <address@hidden>
POWER8 / PowerISA 2.07 has a new special purpose register called PSPB
("Problem State Priority Boost Register"). The contents of this register
are currently lost during migration. To be able to migrate this register,
too, we've got to define this SPR along with the other SPRs of POWER8.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 2b10597..8fc0fb4 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1380,6 +1380,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
ifetch)
#define SPR_UAMOR (0x09D)
#define SPR_MPC_ICTRL (0x09E)
#define SPR_MPC_BAR (0x09F)
+#define SPR_PSPB (0x09F)
#define SPR_VRSAVE (0x100)
#define SPR_USPRG0 (0x100)
#define SPR_USPRG1 (0x101)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index bd0cffc..f72148c 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7842,6 +7842,14 @@ static void gen_spr_power8_fscr(CPUPPCState *env)
KVM_REG_PPC_FSCR, initval);
}
+static void gen_spr_power8_pspb(CPUPPCState *env)
+{
+ spr_register_kvm(env, SPR_PSPB, "PSPB",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic32,
+ KVM_REG_PPC_PSPB, 0);
+}
+
static void init_proc_book3s_64(CPUPPCState *env, int version)
{
gen_spr_ne_601(env);
@@ -7892,6 +7900,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
gen_spr_power8_pmu_sup(env);
gen_spr_power8_pmu_user(env);
gen_spr_power8_tm(env);
+ gen_spr_power8_pspb(env);
gen_spr_vtb(env);
}
if (version < BOOK3S_CPU_POWER8) {
--
2.5.0
- [Qemu-devel] [PULL 11/16] spapr_pci: Switch to vfio_eeh_as_op() interface, (continued)
- [Qemu-devel] [PULL 11/16] spapr_pci: Switch to vfio_eeh_as_op() interface, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 03/16] ppc: Add a few more P8 PMU SPRs, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 09/16] spapr_rng: fix race with main loop, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 15/16] spapr_pci: Remove finish_realize hook, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 07/16] target-ppc: Add helpers for updating a CPU's SDR1 and external HPT, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 16/16] vfio: Eliminate vfio_container_ioctl(), David Gibson, 2016/03/16
- [Qemu-devel] [PULL 14/16] spapr_pci: (Mostly) remove spapr-pci-vfio-host-bridge, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 08/16] target-ppc: Eliminate kvmppc_kern_htab global, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 12/16] spapr_pci: Eliminate class callbacks, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 06/16] target-ppc: Split out SREGS get/put functions, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 01/16] ppc: Define the PSPB register on POWER8,
David Gibson <=
- [Qemu-devel] [PULL 10/16] vfio: Start improving VFIO/EEH interface, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 13/16] spapr_pci: Allow EEH on spapr-pci-host-bridge, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 04/16] target-ppc: Add PVR for POWER8NVL processor, David Gibson, 2016/03/16
- [Qemu-devel] [PULL 05/16] spapr_pci: fix multifunction hotplug, David Gibson, 2016/03/16
- Re: [Qemu-devel] [PULL 00/16] ppc-for-2.6 queue 20160316, Peter Maydell, 2016/03/16