[Qemu-devel] [PATCH 2/2] target-arm: Fix an exception return on AArch32 instruction ADDS

[Sergey Sorokin]

In AArch32 instruction ADDS r15, ... is used for exception return.

Signed-off-by: Sergey Sorokin <address@hidden>
---
 target-arm/translate.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 68671b7..3e64ba9 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8512,12 +8512,21 @@ static void disas_arm_insn(DisasContext *s, unsigned 
int insn)
             store_reg_bx(s, rd, tmp);
             break;
         case 0x04:
-            if (set_cc) {
+            if (set_cc && rd == 15) {
+                /* ADDS r15, ... is used for exception return. */
+                if (IS_USER(s)) {
+                    goto illegal_op;
+                }
                 gen_add_CC(tmp, tmp, tmp2);
+                gen_exception_return(s, tmp);
             } else {
-                tcg_gen_add_i32(tmp, tmp, tmp2);
+                if (set_cc) {
+                    gen_add_CC(tmp, tmp, tmp2);
+                } else {
+                    tcg_gen_add_i32(tmp, tmp, tmp2);
+                }
+                store_reg_bx(s, rd, tmp);
             }
-            store_reg_bx(s, rd, tmp);
             break;
         case 0x05:
             if (set_cc) {
-- 
1.9.3