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[Qemu-devel] [PATCH 23/42] target/arm: Convert VNMUL to decodetree
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 23/42] target/arm: Convert VNMUL to decodetree |
Date: |
Thu, 6 Jun 2019 18:45:50 +0100 |
Convert the VNMUL instruction to decodetree.
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-vfp.inc.c | 24 ++++++++++++++++++++++++
target/arm/translate.c | 7 +------
target/arm/vfp.decode | 5 +++++
3 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
index a2afe82b349..4c684f033b6 100644
--- a/target/arm/translate-vfp.inc.c
+++ b/target/arm/translate-vfp.inc.c
@@ -1427,3 +1427,27 @@ static bool trans_VMUL_dp(DisasContext *s, arg_VMUL_sp
*a)
{
return do_vfp_3op_dp(s, gen_helper_vfp_muld, a->vd, a->vn, a->vm, false);
}
+
+static void gen_VNMUL_sp(TCGv_i32 vd, TCGv_i32 vn, TCGv_i32 vm, TCGv_ptr fpst)
+{
+ /* VNMUL: -(fn * fm) */
+ gen_helper_vfp_muls(vd, vn, vm, fpst);
+ gen_helper_vfp_negs(vd, vd);
+}
+
+static bool trans_VNMUL_sp(DisasContext *s, arg_VNMUL_sp *a)
+{
+ return do_vfp_3op_sp(s, gen_VNMUL_sp, a->vd, a->vn, a->vm, false);
+}
+
+static void gen_VNMUL_dp(TCGv_i64 vd, TCGv_i64 vn, TCGv_i64 vm, TCGv_ptr fpst)
+{
+ /* VNMUL: -(fn * fm) */
+ gen_helper_vfp_muld(vd, vn, vm, fpst);
+ gen_helper_vfp_negd(vd, vd);
+}
+
+static bool trans_VNMUL_dp(DisasContext *s, arg_VNMUL_sp *a)
+{
+ return do_vfp_3op_dp(s, gen_VNMUL_dp, a->vd, a->vn, a->vm, false);
+}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 226f1006ced..23addcf53d6 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1388,7 +1388,6 @@ static inline void gen_vfp_##name(int dp)
\
VFP_OP2(add)
VFP_OP2(sub)
-VFP_OP2(mul)
VFP_OP2(div)
#undef VFP_OP2
@@ -3112,7 +3111,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
rn = VFP_SREG_N(insn);
switch (op) {
- case 0 ... 4:
+ case 0 ... 5:
/* Already handled by decodetree */
return 1;
default:
@@ -3298,10 +3297,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
for (;;) {
/* Perform the calculation. */
switch (op) {
- case 5: /* nmul: -(fn * fm) */
- gen_vfp_mul(dp);
- gen_vfp_neg(dp);
- break;
case 6: /* add: fn + fm */
gen_vfp_add(dp);
break;
diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode
index d7fcb9709a9..3063fcac23f 100644
--- a/target/arm/vfp.decode
+++ b/target/arm/vfp.decode
@@ -122,3 +122,8 @@ VMUL_sp ---- 1110 0.10 .... .... 1010 .0.0 .... \
vm=%vm_sp vn=%vn_sp vd=%vd_sp
VMUL_dp ---- 1110 0.10 .... .... 1011 .0.0 .... \
vm=%vm_dp vn=%vn_dp vd=%vd_dp
+
+VNMUL_sp ---- 1110 0.10 .... .... 1010 .1.0 .... \
+ vm=%vm_sp vn=%vn_sp vd=%vd_sp
+VNMUL_dp ---- 1110 0.10 .... .... 1011 .1.0 .... \
+ vm=%vm_dp vn=%vn_dp vd=%vd_dp
--
2.20.1
- [Qemu-devel] [PATCH 10/42] target/arm: Move the VFP trans_* functions to translate-vfp.inc.c, (continued)
- [Qemu-devel] [PATCH 10/42] target/arm: Move the VFP trans_* functions to translate-vfp.inc.c, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 30/42] target/arm: Convert VNEG to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 24/42] target/arm: Convert VADD to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 05/42] target/arm: Explicitly enable VFP short-vectors for aarch32 -cpu max, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 03/42] target/arm: Factor out VFP access checking code, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 23/42] target/arm: Convert VNMUL to decodetree,
Peter Maydell <=
- [Qemu-devel] [PATCH 31/42] target/arm: Convert VSQRT to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 04/42] target/arm: Fix Cortex-R5F MVFR values, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 22/42] target/arm: Convert VMUL to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 20/42] target/arm: Convert VFP VNMLS to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 36/42] target/arm: Convert VFP round insns to decodetree, Peter Maydell, 2019/06/06