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Re: [Qemu-devel] [PATCH 11/42] target/arm: Add helpers for VFP register
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 11/42] target/arm: Add helpers for VFP register loads and stores |
Date: |
Fri, 7 Jun 2019 12:11:55 -0500 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 |
On 6/6/19 12:45 PM, Peter Maydell wrote:
> The current VFP code has two different idioms for
> loading and storing from the VFP register file:
> 1 using the gen_mov_F0_vreg() and similar functions,
> which load and store to a fixed set of TCG globals
> cpu_F0s, CPU_F0d, etc
> 2 by direct calls to tcg_gen_ld_f64() and friends
>
> We want to phase out idiom 1 (because the use of the
> fixed globals is a relic of a much older version of TCG),
> but idiom 2 is quite longwinded:
> tcg_gen_ld_f64(tmp, cpu_env, vfp_reg_offset(true, reg))
> requires us to specify the 64-bitness twice, once in
> the function name and once by passing 'true' to
> vfp_reg_offset(). There's no guard against accidentally
> passing the wrong flag.
>
> Instead, let's move to a convention of accessing 64-bit
> registers via the existing neon_load_reg64() and
> neon_store_reg64(), and provide new neon_load_reg32()
> and neon_store_reg32() for the 32-bit equivalents.
>
> Implement the new functions and use them in the code in
> translate-vfp.inc.c. We will convert the rest of the VFP
> code as we do the decodetree conversion in subsequent
> commits.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/translate-vfp.inc.c | 40 +++++++++++++++++-----------------
> target/arm/translate.c | 10 +++++++++
> 2 files changed, 30 insertions(+), 20 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-devel] [PATCH 00/42] target/arm: Convert VFP decoder to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 16/42] target/arm: Convert the VFP load/store multiple insns to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 11/42] target/arm: Add helpers for VFP register loads and stores, Peter Maydell, 2019/06/06
- Re: [Qemu-devel] [PATCH 11/42] target/arm: Add helpers for VFP register loads and stores,
Richard Henderson <=
- [Qemu-devel] [PATCH 01/42] decodetree: Fix comparison of Field, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 08/42] target/arm: Convert VRINTA/VRINTN/VRINTP/VRINTM to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 15/42] target/arm: Convert VFP VLDR and VSTR to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 38/42] target/arm: Convert integer-to-float insns to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 26/42] target/arm: Convert VDIV to decodetree, Peter Maydell, 2019/06/06
- [Qemu-devel] [PATCH 14/42] target/arm: Convert VFP two-register transfer insns to decodetree, Peter Maydell, 2019/06/06