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[Qemu-devel] [PATCH v20 04/24] target/rx: Follow the change of tcg.
From: |
Yoshinori Sato |
Subject: |
[Qemu-devel] [PATCH v20 04/24] target/rx: Follow the change of tcg. |
Date: |
Sun, 16 Jun 2019 23:28:16 +0900 |
Add cpu-param.h
Remove CPU_COMMON
Use env_cpu
Signed-off-by: Yoshinori Sato <address@hidden>
---
target/rx/cpu-param.h | 31 +++++++++++++++++++++++++++++++
target/rx/cpu.h | 21 +--------------------
target/rx/cpu.c | 1 +
target/rx/op_helper.c | 6 +++---
4 files changed, 36 insertions(+), 23 deletions(-)
create mode 100644 target/rx/cpu-param.h
diff --git a/target/rx/cpu-param.h b/target/rx/cpu-param.h
new file mode 100644
index 0000000000..5da87fbebe
--- /dev/null
+++ b/target/rx/cpu-param.h
@@ -0,0 +1,31 @@
+/*
+ * RX cpu parameters
+ *
+ * Copyright (c) 2019 Yoshinori Sato
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef RX_CPU_PARAM_H
+#define RX_CPU_PARAM_H
+
+#define TARGET_LONG_BITS 32
+#define TARGET_PAGE_BITS 12
+
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
+#define NB_MMU_MODES 1
+#define MMU_MODE0_SUFFIX _all
+
+#endif
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index 3e5f371f51..3f9c4fdd25 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -25,14 +25,8 @@
#include "cpu-qom.h"
#include "qom/cpu.h"
-#define TARGET_LONG_BITS 32
-#define TARGET_PAGE_BITS 12
-
#include "exec/cpu-defs.h"
-#define TARGET_PHYS_ADDR_SPACE_BITS 32
-#define TARGET_VIRT_ADDR_SPACE_BITS 32
-
/* PSW define */
REG32(PSW, 0)
FIELD(PSW, C, 0, 1)
@@ -69,9 +63,6 @@ FIELD(FPSW, FX, 30, 1)
FIELD(FPSW, FLAGS, 26, 4)
FIELD(FPSW, FS, 31, 1)
-#define NB_MMU_MODES 1
-#define MMU_MODE0_SUFFIX _all
-
enum {
NUM_REGS = 16,
};
@@ -108,8 +99,6 @@ typedef struct CPURXState {
uint32_t ack_ipl; /* execute ipl */
float_status fp_status;
qemu_irq ack; /* Interrupt acknowledge */
-
- CPU_COMMON
} CPURXState;
/*
@@ -123,19 +112,13 @@ struct RXCPU {
CPUState parent_obj;
/*< public >*/
+ CPUNegativeOffsetState neg;
CPURXState env;
};
typedef struct RXCPU RXCPU;
typedef RXCPU ArchCPU;
-static inline RXCPU *rx_env_get_cpu(CPURXState *env)
-{
- return container_of(env, RXCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(rx_env_get_cpu(e))
-
#define ENV_OFFSET offsetof(RXCPU, env)
#define RX_CPU_TYPE_SUFFIX "-" TYPE_RX_CPU
@@ -156,8 +139,6 @@ int cpu_rx_signal_handler(int host_signum, void *pinfo,
void *puc);
void rx_cpu_list(void);
-void rx_load_image(RXCPU *cpu, const char *filename,
- uint32_t start, uint32_t size);
void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
#define cpu_signal_handler cpu_rx_signal_handler
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 4147c5c939..a6dde613ab 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -173,6 +173,7 @@ static void rx_cpu_init(Object *obj)
RXCPU *cpu = RXCPU(obj);
CPURXState *env = &cpu->env;
+ cpu_set_cpustate_pointers(cpu);
cs->env_ptr = env;
qdev_init_gpio_in(DEVICE(cpu), rx_cpu_set_irq, 2);
}
diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index fb7ae3c3ec..f89d294f2b 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -421,7 +421,7 @@ uint32_t helper_divu(CPURXState *env, uint32_t num,
uint32_t den)
static inline void QEMU_NORETURN raise_exception(CPURXState *env, int index,
uintptr_t retaddr)
{
- CPUState *cs = CPU(rx_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
cs->exception_index = index;
cpu_loop_exit_restore(cs, retaddr);
@@ -444,7 +444,7 @@ void QEMU_NORETURN
helper_raise_illegal_instruction(CPURXState *env)
void QEMU_NORETURN helper_wait(CPURXState *env)
{
- CPUState *cs = CPU(rx_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
cs->halted = 1;
env->in_sleep = 1;
@@ -453,7 +453,7 @@ void QEMU_NORETURN helper_wait(CPURXState *env)
void QEMU_NORETURN helper_debug(CPURXState *env)
{
- CPUState *cs = CPU(rx_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
cs->exception_index = EXCP_DEBUG;
cpu_loop_exit(cs);
--
2.11.0
- [Qemu-devel] [PATCH v20 00/24] Add RX archtecture support, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 08/24] target/rx: Replace operand with prt_ldmi in disassembler, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 10/24] target/rx: Emit all disassembly in one prt(), Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 12/24] target/rx: Dump bytes for each insn during disassembly, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 09/24] target/rx: Use prt_ldmi for XCHG_mr disassembly, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 14/24] hw/timer: RX62N internal timer modules, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 07/24] target/rx: Disassemble rx_index_addr into a string, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 04/24] target/rx: Follow the change of tcg.,
Yoshinori Sato <=
- [Qemu-devel] [PATCH v20 15/24] hw/char: RX62N serial communication interface (SCI), Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 05/24] target/rx: simplify rx_cpu_class_by_name, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 17/24] target/rx: Move rx_load_image to rx-virt., Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 18/24] hw/rx: Honor -accel qtest, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 24/24] BootLinuxConsoleTest: Test the RX-Virt machine, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 01/24] target/rx: TCG translation, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 20/24] qemu/bitops.h: Add extract8 and extract16, Yoshinori Sato, 2019/06/16
- [Qemu-devel] [PATCH v20 16/24] hw/rx: RX Target hardware definition, Yoshinori Sato, 2019/06/16