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[Qemu-devel] [PATCH v4 13/13] target/ppc: convert vmrgl instructions to
From: |
Stefan Brankovic |
Subject: |
[Qemu-devel] [PATCH v4 13/13] target/ppc: convert vmrgl instructions to vector operations |
Date: |
Thu, 27 Jun 2019 12:56:25 +0200 |
Signed-off-by: Stefan Brankovic <address@hidden>
---
target/ppc/helper.h | 3 ---
target/ppc/int_helper.c | 9 ---------
target/ppc/translate/vmx-impl.inc.c | 6 +++---
3 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 9a7721f..0f10657 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -161,9 +161,6 @@ DEF_HELPER_4(vcmpeqfp_dot, void, env, avr, avr, avr)
DEF_HELPER_4(vcmpgefp_dot, void, env, avr, avr, avr)
DEF_HELPER_4(vcmpgtfp_dot, void, env, avr, avr, avr)
DEF_HELPER_4(vcmpbfp_dot, void, env, avr, avr, avr)
-DEF_HELPER_3(vmrglb, void, avr, avr, avr)
-DEF_HELPER_3(vmrglh, void, avr, avr, avr)
-DEF_HELPER_3(vmrglw, void, avr, avr, avr)
DEF_HELPER_3(vmulesb, void, avr, avr, avr)
DEF_HELPER_3(vmulesh, void, avr, avr, avr)
DEF_HELPER_3(vmulesw, void, avr, avr, avr)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index 00e6e02..4b6e074 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -946,15 +946,6 @@ void helper_vmladduhm(ppc_avr_t *r, ppc_avr_t *a,
ppc_avr_t *b, ppc_avr_t *c)
*r = result; \
}
-#define VMRG(suffix, element, access) \
- VMRG_DO(mrgl##suffix, element, access, half) \
-
-VMRG(b, u8, VsrB)
-VMRG(h, u16, VsrH)
-VMRG(w, u32, VsrW)
-#undef VMRG_DO
-#undef VMRG
-
void helper_vmsummbm(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
ppc_avr_t *b, ppc_avr_t *c)
{
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index e02390f..12f41af 100644
--- a/target/ppc/translate/vmx-impl.inc.c
+++ b/target/ppc/translate/vmx-impl.inc.c
@@ -449,9 +449,9 @@ GEN_VXFORM(vavgsw, 1, 22);
GEN_VXFORM_V(vmrghb, MO_8, tcg_gen_gvec_vmrgh, 6, 0);
GEN_VXFORM_V(vmrghh, MO_16, tcg_gen_gvec_vmrgh, 6, 1);
GEN_VXFORM_V(vmrghw, MO_32, tcg_gen_gvec_vmrgh, 6, 2);
-GEN_VXFORM(vmrglb, 6, 4);
-GEN_VXFORM(vmrglh, 6, 5);
-GEN_VXFORM(vmrglw, 6, 6);
+GEN_VXFORM_V(vmrglb, MO_8, tcg_gen_gvec_vmrgl, 6, 4);
+GEN_VXFORM_V(vmrglh, MO_16, tcg_gen_gvec_vmrgl, 6, 5);
+GEN_VXFORM_V(vmrglw, MO_32, tcg_gen_gvec_vmrgl, 6, 6);
static void trans_vmrgew(DisasContext *ctx)
{
--
2.7.4
- [Qemu-devel] [PATCH v4 02/13] target/ppc: Optimize emulation of vsl and vsr instructions, (continued)
- [Qemu-devel] [PATCH v4 02/13] target/ppc: Optimize emulation of vsl and vsr instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 01/13] target/ppc: Optimize emulation of lvsl and lvsr instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 03/13] target/ppc: Optimize emulation of vgbbd instruction, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 05/13] target/ppc: Optimize emulation of vclzw instruction, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 06/13] target/ppc: Optimize emulation of vclzh and vclzb instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 09/13] tcg/i386: Implement vector vmrgh instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 10/13] target/ppc: convert vmrgh instructions to vector operations, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 07/13] target/ppc: Refactor emulation of vmrgew and vmrgow instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 11/13] tcg: Add opcodes for verctor vmrgl instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 12/13] tcg/i386: Implement vector vmrgl instructions, Stefan Brankovic, 2019/06/27
- [Qemu-devel] [PATCH v4 13/13] target/ppc: convert vmrgl instructions to vector operations,
Stefan Brankovic <=
- [Qemu-devel] [PATCH v4 08/13] tcg: Add opcodes for vector vmrgh instructions, Stefan Brankovic, 2019/06/27
- Re: [Qemu-devel] [PATCH v4 00/13] target/ppc, tcg, tcg/i386: Optimize emulation of some Altivec instructions, Howard Spoelstra, 2019/06/27