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Re: [Qemu-devel] [PATCH v6 15/16] tcg/ppc: Update vector support to v2.0
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH v6 15/16] tcg/ppc: Update vector support to v2.07 |
Date: |
Mon, 1 Jul 2019 05:57:05 +0200 |
On Jun 30, 2019 5:12 PM, "Richard Henderson" <address@hidden>
wrote:
>
> On 6/30/19 3:37 PM, Aleksandar Markovic wrote:
> >> bool have_isa_2_06;
> >> bool have_isa_2_06_vsx;
> >> +bool have_isa_2_07_vsx;
> >
> > Does this flag indicate support for PowerISA 2.07 or VSX?
>
> VSX & 2.07,
>
> >> + if (hwcap2 & PPC_FEATURE2_ARCH_2_07) {
> >> + if (hwcap & PPC_FEATURE_HAS_VSX) {
> >> + have_isa_2_07_vsx = true;
> >> + }
> >> + }
>
> Like so.
>
> While it would have been possible to have one single have_isa_vsx, we
would
> then also have to check a second flag to see which revision. Therefore I
> created these composite flags so that we only have to check one.
>
Yes, but, in this patch, for example, among other things, the support for
doubleword integer max/min vector operation is implemented. Why is the
existence of that support dependant on VSX (PPC_FEATURE_HAS_VSX)?
>
> r~
[Qemu-devel] [PATCH v6 12/16] tcg/ppc: Support vector dup2, Richard Henderson, 2019/06/29
[Qemu-devel] [PATCH v6 03/16] tcg/ppc: Introduce macros VRT(), VRA(), VRB(), VRC(), Richard Henderson, 2019/06/29
[Qemu-devel] [PATCH v6 10/16] tcg/ppc: Support vector shift by immediate, Richard Henderson, 2019/06/29
[Qemu-devel] [PATCH v6 08/16] tcg/ppc: Add support for vector saturated add/subtract, Richard Henderson, 2019/06/29
[Qemu-devel] [PATCH v6 01/16] tcg/ppc: Introduce Altivec registers, Richard Henderson, 2019/06/29
[Qemu-devel] [PATCH v6 05/16] tcg/ppc: Add support for load/store/logic/comparison, Richard Henderson, 2019/06/29
Re: [Qemu-devel] [PATCH v6 00/16] tcg/ppc: Add vector opcodes, no-reply, 2019/06/29
Re: [Qemu-devel] [PATCH v6 00/16] tcg/ppc: Add vector opcodes, Mark Cave-Ayland, 2019/06/30