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Re: [Qemu-devel] [PATCH v9 1/2] hw/arm: Add arm SBSA reference machine,
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v9 1/2] hw/arm: Add arm SBSA reference machine, skeleton part |
Date: |
Mon, 1 Jul 2019 15:28:01 +0100 |
On Sun, 30 Jun 2019 at 11:21, Hongbo Zhang <address@hidden> wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtualization workloads, but we need an
> environment as faithful as possible to physical hardware, for supporting
> firmware and OS development for pysical Aarch64 machines.
"physical"
>
> This patch introduces new machine type 'sbsa-ref' with main features:
> - Based on 'virt' machine type.
> - A new memory map.
> - CPU type cortex-a57.
> - EL2 and EL3 are enabled.
> - GIC version 3.
> - System bus AHCI controller.
> - System bus EHCI controller.
> - CDROM and hard disc on AHCI bus.
> - E1000E ethernet card on PCIE bus.
> - VGA display adaptor on PCIE bus.
> - No virtio deivces.
"devices"
> - No fw_cfg device.
> - No ACPI table supplied.
> - Only minimal device tree nodes.
>
> Arm Trusted Firmware and UEFI porting to this are done accordingly, and
> it should supply ACPI tables to load OS, the minimal device tree nodes
> supplied from this platform are only to pass the dynamic info reflecting
> command line input to firmware, not for loading OS.
>
> To make the review easier, this task is split into two patches, the
> fundamental sceleton part and the peripheral devices part, this patch is
"skeleton"
> the first part.
>
> Signed-off-by: Hongbo Zhang <address@hidden>
> ---
> +static const int sbsa_ref_irqmap[] = {
> + [SBSA_UART] = 1,
> + [SBSA_RTC] = 2,
> + [SBSA_PCIE] = 3, /* ... to 6 */
> + [SBSA_GPIO] = 7,
> + [SBSA_SECURE_UART] = 8,
> + [SBSA_SECURE_UART_MM] = 9,
> + [SBSA_AHCI] = 10,
> + [SBSA_EHCI] = 11,
> +};
This array isn't used in this patch, so it needs to be moved
into patch 2, to avoid a compile failure with clang because
of the unused-variable.
thanks
-- PMM