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Re: [Qemu-devel] [PATCH 1/5] include/qemu/atomic.h: Add signal_barrier
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH 1/5] include/qemu/atomic.h: Add signal_barrier |
Date: |
Tue, 09 Jul 2019 11:03:04 +0100 |
User-agent: |
mu4e 1.3.2; emacs 26.1 |
Richard Henderson <address@hidden> writes:
> We have some potential race conditions vs our user-exec signal
> handler that will be solved with this barrier.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
> ---
> include/qemu/atomic.h | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
> index a6ac188188..f9cd24c899 100644
> --- a/include/qemu/atomic.h
> +++ b/include/qemu/atomic.h
> @@ -88,6 +88,13 @@
> #define smp_read_barrier_depends() barrier()
> #endif
>
> +/*
> + * A signal barrier forces all pending local memory ops to be observed before
> + * a SIGSEGV is delivered to the *same* thread. In practice this is exactly
> + * the same as barrier(), but since we have the correct builtin, use it.
> + */
> +#define signal_barrier() __atomic_signal_fence(__ATOMIC_SEQ_CST)
> +
> /* Sanity check that the size of an atomic operation isn't "overly large".
> * Despite the fact that e.g. i686 has 64-bit atomic operations, we do not
> * want to use them because we ought not need them, and this lets us do a
> @@ -308,6 +315,10 @@
> #define smp_read_barrier_depends() barrier()
> #endif
>
> +#ifndef signal_barrier
> +#define signal_barrier() barrier()
> +#endif
> +
> /* These will only be atomic if the processor does the fetch or store
> * in a single issue memory operation
> */
--
Alex Bennée