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Re: [Qemu-devel] [PATCH] tcg/aarch64: Fix output of extract2 opcodes
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [Qemu-devel] [PATCH] tcg/aarch64: Fix output of extract2 opcodes |
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Date: |
Wed, 10 Jul 2019 12:22:12 +0200 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 |
On 7/9/19 8:48 PM, Richard Henderson wrote:
> The aarch64 argument ordering for the operands is big-endian,
> whereas the tcg argument ordering is little-endian. Use REG0
> so that we honor the rZ constraints.
>
> Fixes: 464c2969d5d
> Reported-by: Peter Maydell <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> tcg/aarch64/tcg-target.inc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
> index b0f8106642..0713448bf5 100644
> --- a/tcg/aarch64/tcg-target.inc.c
> +++ b/tcg/aarch64/tcg-target.inc.c
> @@ -2226,7 +2226,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>
> case INDEX_op_extract2_i64:
> case INDEX_op_extract2_i32:
> - tcg_out_extr(s, ext, a0, a1, a2, args[3]);
> + tcg_out_extr(s, ext, a0, REG0(2), REG0(1), args[3]);
> break;
>
> case INDEX_op_add2_i32:
>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>