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[Qemu-devel] [RFC v5 26/29] hw/arm/smmuv3: Fill the IOTLBEntry leaf fiel
From: |
Eric Auger |
Subject: |
[Qemu-devel] [RFC v5 26/29] hw/arm/smmuv3: Fill the IOTLBEntry leaf field on NH_VA invalidation |
Date: |
Thu, 11 Jul 2019 19:39:30 +0200 |
Let's propagate the leaf attribute throughout the invalidation path.
This hint is used to reduce the scope of the invalidations to the
last level of translation. Not enforcing it induces large performance
penalties in nested mode.
Signed-off-by: Eric Auger <address@hidden>
---
hw/arm/smmuv3.c | 16 +++++++++-------
hw/arm/trace-events | 2 +-
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 8c88923f73..2a6bf78a8e 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -797,8 +797,7 @@ epilogue:
*/
static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
IOMMUNotifier *n,
- int asid,
- dma_addr_t iova)
+ int asid, dma_addr_t iova, bool leaf)
{
SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
SMMUEventInfo event = {.inval_ste_allowed = true};
@@ -825,12 +824,14 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
entry.addr_mask = (1 << tt->granule_sz) - 1;
entry.perm = IOMMU_NONE;
entry.arch_id = asid;
+ entry.leaf = leaf;
memory_region_notify_one(n, &entry);
}
/* invalidate an asid/iova tuple in all mr's */
-static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova)
+static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid,
+ dma_addr_t iova, bool leaf)
{
SMMUDevice *sdev;
@@ -841,7 +842,7 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int
asid, dma_addr_t iova)
trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, iova);
IOMMU_NOTIFIER_FOREACH(n, mr) {
- smmuv3_notify_iova(mr, n, asid, iova);
+ smmuv3_notify_iova(mr, n, asid, iova, leaf);
}
}
}
@@ -979,9 +980,10 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
{
dma_addr_t addr = CMD_ADDR(&cmd);
uint16_t vmid = CMD_VMID(&cmd);
+ bool leaf = CMD_LEAF(&cmd);
- trace_smmuv3_cmdq_tlbi_nh_vaa(vmid, addr);
- smmuv3_inv_notifiers_iova(bs, -1, addr);
+ trace_smmuv3_cmdq_tlbi_nh_vaa(vmid, addr, leaf);
+ smmuv3_inv_notifiers_iova(bs, -1, addr, leaf);
smmu_iotlb_inv_all(bs);
break;
}
@@ -993,7 +995,7 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
bool leaf = CMD_LEAF(&cmd);
trace_smmuv3_cmdq_tlbi_nh_va(vmid, asid, addr, leaf);
- smmuv3_inv_notifiers_iova(bs, asid, addr);
+ smmuv3_inv_notifiers_iova(bs, asid, addr, leaf);
smmu_iotlb_inv_iova(bs, asid, addr);
break;
}
diff --git a/hw/arm/trace-events b/hw/arm/trace-events
index 0acedcedc6..3809005cba 100644
--- a/hw/arm/trace-events
+++ b/hw/arm/trace-events
@@ -43,7 +43,7 @@ smmuv3_cmdq_cfgi_cd(uint32_t sid) "streamid = %d"
smmuv3_config_cache_hit(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t
perc) "Config cache HIT for sid %d (hits=%d, misses=%d, hit rate=%d)"
smmuv3_config_cache_miss(uint32_t sid, uint32_t hits, uint32_t misses,
uint32_t perc) "Config cache MISS for sid %d (hits=%d, misses=%d, hit rate=%d)"
smmuv3_cmdq_tlbi_nh_va(int vmid, int asid, uint64_t addr, bool leaf) "vmid =%d
asid =%d addr=0x%"PRIx64" leaf=%d"
-smmuv3_cmdq_tlbi_nh_vaa(int vmid, uint64_t addr) "vmid =%d addr=0x%"PRIx64
+smmuv3_cmdq_tlbi_nh_vaa(int vmid, uint64_t addr, bool leaf) "vmid =%d
addr=0x%"PRIx64" leaf=%d"
smmuv3_cmdq_tlbi_nh(void) ""
smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) "asid=%d"
smmu_iotlb_cache_hit(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t
miss, uint32_t p) "IOTLB cache HIT asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit
rate=%d"
--
2.20.1
- [Qemu-devel] [RFC v5 16/29] vfio: Introduce helpers to DMA map/unmap a RAM section, (continued)
- [Qemu-devel] [RFC v5 16/29] vfio: Introduce helpers to DMA map/unmap a RAM section, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 17/29] vfio: Set up nested stage mappings, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 18/29] vfio: Pass stage 1 MSI bindings to the host, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 19/29] vfio: Helper to get IRQ info including capabilities, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 20/29] vfio/pci: Register handler for iommu fault, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 21/29] vfio/pci: Set up the DMA FAULT region, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 22/29] vfio/pci: Implement the DMA fault handler, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 23/29] hw/arm/smmuv3: Advertise MSI_TRANSLATE attribute, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 25/29] hw/arm/smmuv3: Fill the IOTLBEntry arch_id on NH_VA invalidation, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 24/29] hw/arm/smmuv3: Store the PASID table GPA in the translation config, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 26/29] hw/arm/smmuv3: Fill the IOTLBEntry leaf field on NH_VA invalidation,
Eric Auger <=
- [Qemu-devel] [RFC v5 27/29] hw/arm/smmuv3: Pass stage 1 configurations to the host, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 28/29] hw/arm/smmuv3: Implement fault injection, Eric Auger, 2019/07/11
- [Qemu-devel] [RFC v5 29/29] vfio: Remove VFIO/SMMUv3 assert, Eric Auger, 2019/07/11
- Re: [Qemu-devel] [RFC v5 00/29] vSMMUv3/pSMMUv3 2 stage VFIO integration, no-reply, 2019/07/11