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[Qemu-devel] [PATCH v4 01/54] target/arm: handle M-profile semihosting a
From: |
Alex Bennée |
Subject: |
[Qemu-devel] [PATCH v4 01/54] target/arm: handle M-profile semihosting at translate time |
Date: |
Wed, 31 Jul 2019 17:06:26 +0100 |
We do this for other semihosting calls so we might as well do it for
M-profile as well.
Signed-off-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target/arm/m_helper.c | 18 ++++++------------
target/arm/translate.c | 20 +++++++++++++++++++-
2 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 84609f446e6..129d52a56bf 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -2113,19 +2113,13 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
break;
}
break;
+ case EXCP_SEMIHOST:
+ qemu_log_mask(CPU_LOG_INT,
+ "...handling as semihosting call 0x%x\n",
+ env->regs[0]);
+ env->regs[0] = do_arm_semihosting(env);
+ return;
case EXCP_BKPT:
- if (semihosting_enabled()) {
- int nr;
- nr = arm_lduw_code(env, env->regs[15], arm_sctlr_b(env)) & 0xff;
- if (nr == 0xab) {
- env->regs[15] += 2;
- qemu_log_mask(CPU_LOG_INT,
- "...handling as semihosting call 0x%x\n",
- env->regs[0]);
- env->regs[0] = do_arm_semihosting(env);
- return;
- }
- }
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_DEBUG, false);
break;
case EXCP_IRQ:
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 7853462b21b..0b02c520395 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10976,6 +10976,24 @@ illegal_op:
default_exception_el(s));
}
+/*
+ * Thumb BKPT. On M-profile CPUs this may be a semihosting call which
+ * we can process much the same way as gen_hlt() above.
+ */
+static inline void gen_thumb_bkpt(DisasContext *s, int imm8)
+{
+ if (arm_dc_feature(s, ARM_FEATURE_M) &&
+ semihosting_enabled() &&
+#ifndef CONFIG_USER_ONLY
+ s->current_el != 0 &&
+#endif
+ (imm8 == 0xab)) {
+ gen_exception_internal_insn(s, 0, EXCP_SEMIHOST);
+ return;
+ }
+ gen_exception_bkpt_insn(s, 2, syn_aa32_bkpt(imm8, true));
+}
+
static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{
uint32_t val, op, rm, rn, rd, shift, cond;
@@ -11611,7 +11629,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t
insn)
{
int imm8 = extract32(insn, 0, 8);
ARCH(5);
- gen_exception_bkpt_insn(s, 2, syn_aa32_bkpt(imm8, true));
+ gen_thumb_bkpt(s, imm8);
break;
}
--
2.20.1
- [Qemu-devel] [PATCH v4 00/54] plugins for TCG, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 01/54] target/arm: handle M-profile semihosting at translate time,
Alex Bennée <=
- [Qemu-devel] [PATCH v4 02/54] target/arm: handle A-profile T32 semihosting at translate time, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 03/54] target/arm: handle A-profile A32 semihosting at translate time, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 06/54] trace: expand mem_info:size_shift to 4 bits, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 04/54] target/arm: remove run time semihosting checks, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 15/54] plugin: add implementation of the api, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 10/54] translate-all: use cpu_in_exclusive_work_context() in tb_flush, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 05/54] includes: remove stale [smp|max]_cpus externs, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 08/54] tcg/README: fix typo s/afterwise/afterwards/, Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 12/54] configure: add --enable-plugins (MOVE TO END), Alex Bennée, 2019/07/31
- [Qemu-devel] [PATCH v4 13/54] plugin: add user-facing API, Alex Bennée, 2019/07/31