Re: [Qemu-devel] [RFC PATCH 5/6] hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARs

[Balamuruhan S]

On Wed, Aug 07, 2019 at 10:01:58AM +0200, Cédric Le Goater wrote:
> On 07/08/2019 09:14, Balamuruhan S wrote:
> > During PowerNV boot skiboot populates the device tree by retrieving
> > base address of homer/occ common area from PBA BARs and prd ipoll
> > mask by accessing xscom read/write accesses.
> 
> This looks good. If you could add defines it would be better.

sure.

> 
> Our common XSCOM ops is starting to be a bit messy. May we should think
> about introducing one for P9 and one for P8.

yes, point taken.

Thanks Cedric.
> 
> Thanks,
> 
> C. 
> 
> > Signed-off-by: Balamuruhan S <address@hidden>
> > ---
> >  hw/ppc/pnv_xscom.c | 27 +++++++++++++++++++++++----
> >  1 file changed, 23 insertions(+), 4 deletions(-)
> > 
> > diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> > index 5d5b5e9884..18a780bcdf 100644
> > --- a/hw/ppc/pnv_xscom.c
> > +++ b/hw/ppc/pnv_xscom.c
> > @@ -77,6 +77,29 @@ static uint64_t xscom_read_default(PnvChip *chip, 
> > uint32_t pcba)
> >      case 0x18002:       /* ECID2 */
> >          return 0;
> >  
> > +    /* PBA BAR0 */
> > +    case 0x5012b00: /* P9 homer base address */
> > +        return PNV9_HOMER_BASE(chip);
> > +    case 0x2013f00: /* P8 homer base address */
> > +        return PNV_HOMER_BASE(chip);
> > +
> > +    /* PBA BARMASK0 */
> > +    case 0x5012b04: /* P9 homer region size */
> > +    case 0x2013f04: /* P8 homer region size */
> > +        return PNV_HOMER_SIZE;
> > +
> > +    /* PBA BAR2 */
> > +    case 0x5012b02: /* P9 occ common area */
> > +        return PNV9_OCC_COMMON_AREA(chip);
> > +    case 0x2013f02: /* P8 occ common area */
> > +        return PNV_OCC_COMMON_AREA(chip);
> > +
> > +    /* PBA BARMASK2 */
> > +    case 0x5012b06: /* P9 occ common area size */
> > +    case 0x2013f06: /* P8 occ common area size */
> > +        return PNV_OCC_COMMON_AREA_SIZE;
> > +
> > +
> >      case 0x1010c00:     /* PIBAM FIR */
> >      case 0x1010c03:     /* PIBAM FIR MASK */
> >  
> > @@ -96,13 +119,9 @@ static uint64_t xscom_read_default(PnvChip *chip, 
> > uint32_t pcba)
> >      case 0x2020009:     /* ADU stuff, error register */
> >      case 0x202000f:     /* ADU stuff, receive status register*/
> >          return 0;
> > -    case 0x2013f00:     /* PBA stuff */
> >      case 0x2013f01:     /* PBA stuff */
> > -    case 0x2013f02:     /* PBA stuff */
> >      case 0x2013f03:     /* PBA stuff */
> > -    case 0x2013f04:     /* PBA stuff */
> >      case 0x2013f05:     /* PBA stuff */
> > -    case 0x2013f06:     /* PBA stuff */
> >      case 0x2013f07:     /* PBA stuff */
> >          return 0;
> >      case 0x2013028:     /* CAPP stuff */
> > 
>