Re: [Qemu-devel] [PATCH v2 5/7] target/mips: rationalise softfloat includes

[Aleksandar Markovic]

On Fri, Aug 9, 2019 at 11:23 AM Alex Bennée <address@hidden> wrote:

> We should avoid including the whole of softfloat headers in cpu.h and
> explicitly include it only where we will be calling softfloat
> functions. We can use the -types.h in cpu.h for the few bits that are
> global. We also move the restore_snan_bit_mode into internal.h and
> include -helpers.h there.
>
> Signed-off-by: Alex Bennée <address@hidden>
>
> ---
> v2
>   - move restore_snan_bit_mode to internal.h
> ---
>

OK, yes, this is cleaner compared to the current code organization, and
also cleaner than v1. Thanks.

Reviewed-by: Aleksandar Markovic <address@hidden>

 linux-user/mips/cpu_loop.c | 1 +
>  target/mips/cpu.h          | 8 +-------
>  target/mips/internal.h     | 7 +++++++
>  target/mips/msa_helper.c   | 1 +
>  target/mips/op_helper.c    | 1 +
>  5 files changed, 11 insertions(+), 7 deletions(-)
>
> diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
> index 0ba894fa7aa..39915b3fde2 100644
> --- a/linux-user/mips/cpu_loop.c
> +++ b/linux-user/mips/cpu_loop.c
> @@ -22,6 +22,7 @@
>  #include "qemu.h"
>  #include "cpu_loop-common.h"
>  #include "elf.h"
> +#include "internal.h"
>
>  # ifdef TARGET_ABI_MIPSO32
>  #  define MIPS_SYS(name, args) args,
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 21c0615e020..d235117dab3 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -5,7 +5,7 @@
>
>  #include "cpu-qom.h"
>  #include "exec/cpu-defs.h"
> -#include "fpu/softfloat.h"
> +#include "fpu/softfloat-types.h"
>  #include "mips-defs.h"
>
>  #define TCG_GUEST_DEFAULT_MO (0)
> @@ -1195,12 +1195,6 @@ void itc_reconfigure(struct MIPSITUState *tag);
>  /* helper.c */
>  target_ulong exception_resume_pc(CPUMIPSState *env);
>
> -static inline void restore_snan_bit_mode(CPUMIPSState *env)
> -{
> -    set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) ==
> 0,
> -                        &env->active_fpu.fp_status);
> -}
> -
>  static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong
> *pc,
>                                          target_ulong *cs_base, uint32_t
> *flags)
>  {
> diff --git a/target/mips/internal.h b/target/mips/internal.h
> index b2b41a51ab4..49a7a7d8f56 100644
> --- a/target/mips/internal.h
> +++ b/target/mips/internal.h
> @@ -7,6 +7,7 @@
>  #ifndef MIPS_INTERNAL_H
>  #define MIPS_INTERNAL_H
>
> +#include "fpu/softfloat-helpers.h"
>
>  /* MMU types, the first four entries have the same layout as the
>     CP0C0_MT field.  */
> @@ -226,6 +227,12 @@ static inline void restore_flush_mode(CPUMIPSState
> *env)
>                        &env->active_fpu.fp_status);
>  }
>
> +static inline void restore_snan_bit_mode(CPUMIPSState *env)
> +{
> +    set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) ==
> 0,
> +                        &env->active_fpu.fp_status);
> +}
> +
>  static inline void restore_fp_status(CPUMIPSState *env)
>  {
>      restore_rounding_mode(env);
> diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
> index a5a86572b4a..f24061e2af7 100644
> --- a/target/mips/msa_helper.c
> +++ b/target/mips/msa_helper.c
> @@ -22,6 +22,7 @@
>  #include "internal.h"
>  #include "exec/exec-all.h"
>  #include "exec/helper-proto.h"
> +#include "fpu/softfloat.h"
>
>  /* Data format min and max values */
>  #define DF_BITS(df) (1 << ((df) + 3))
> diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
> index 9e2e02f8586..f88a3ab9043 100644
> --- a/target/mips/op_helper.c
> +++ b/target/mips/op_helper.c
> @@ -25,6 +25,7 @@
>  #include "exec/exec-all.h"
>  #include "exec/cpu_ldst.h"
>  #include "sysemu/kvm.h"
> +#include "fpu/softfloat.h"
>
>
>  
> /*****************************************************************************/
>  /* Exceptions processing helpers */
> --
> 2.20.1
>
>
>