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[Qemu-devel] [PATCH v2] ppc: Fix emulated single to double denormalized
From: |
Paul A. Clarke |
Subject: |
[Qemu-devel] [PATCH v2] ppc: Fix emulated single to double denormalized conversions |
Date: |
Mon, 19 Aug 2019 16:42:16 -0500 |
From: "Paul A. Clarke" <address@hidden>
helper_todouble() was not properly converting any denormalized 32 bit
float to 64 bit double.
Fix-suggested-by: Richard Henderson <address@hidden>
Signed-off-by: Paul A. Clarke <address@hidden>
v2:
- Splitting patch "ppc: Three floating point fixes"; this is just one part.
- Original suggested "fix" was likely flawed. v2 is rewritten by
Richard Henderson (Thanks, Richard!); I reformatted the comments in a
couple of places, compiled, and tested.
---
target/ppc/fpu_helper.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 52bcda2..07bc905 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -73,11 +73,20 @@ uint64_t helper_todouble(uint32_t arg)
/* Zero or Denormalized operand. */
ret = (uint64_t)extract32(arg, 31, 1) << 63;
if (unlikely(abs_arg != 0)) {
- /* Denormalized operand. */
- int shift = clz32(abs_arg) - 9;
- int exp = -126 - shift + 1023;
+ /*
+ * Denormalized operand.
+ * Shift fraction so that the msb is in the implicit bit position.
+ * Thus, shift is in the range [1:23].
+ */
+ int shift = clz32(abs_arg) - 8;
+ /*
+ * The first 3 terms compute the float64 exponent. We then bias
+ * this result by -1 so that we can swallow the implicit bit below.
+ */
+ int exp = -126 - shift + 1023 - 1;
+
ret |= (uint64_t)exp << 52;
- ret |= abs_arg << (shift + 29);
+ ret += (uint64_t)abs_arg << (52 - 23 + shift);
}
}
return ret;
--
1.8.3.1
- [Qemu-devel] [PATCH v2] ppc: Fix emulated single to double denormalized conversions,
Paul A. Clarke <=