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[Qemu-devel] [PATCH 24/26] target/mips: Clean up handling of CP0 registe
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH 24/26] target/mips: Clean up handling of CP0 register 29 |
Date: |
Thu, 22 Aug 2019 13:35:48 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 29.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 22 ++++++++++-------
target/mips/translate.c | 64 ++++++++++++++++++++++++-------------------------
2 files changed, 46 insertions(+), 40 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 55ada8c..90d1373 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -235,12 +235,12 @@ typedef struct mips_def_t mips_def_t;
*
* 0 DataLo DataHi ErrorEPC DESAVE
* 1 TagLo TagHi
- * 2 DataLo1 DataHi KScratch<n>
- * 3 TagLo1 TagHi KScratch<n>
- * 4 DataLo2 DataHi KScratch<n>
- * 5 TagLo2 TagHi KScratch<n>
- * 6 DataLo3 DataHi KScratch<n>
- * 7 TagLo3 TagHi KScratch<n>
+ * 2 DataLo1 DataHi1 KScratch<n>
+ * 3 TagLo1 TagHi1 KScratch<n>
+ * 4 DataLo2 DataHi2 KScratch<n>
+ * 5 TagLo2 TagHi2 KScratch<n>
+ * 6 DataLo3 DataHi3 KScratch<n>
+ * 7 TagLo3 TagHi3 KScratch<n>
*
*/
#define CP0_REGISTER_00 0
@@ -432,8 +432,14 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG28__TAGLO3 6
#define CP0_REG28__DATALO3 7
/* CP0 Register 29 */
-#define CP0_REG29__IDATAHI 1
-#define CP0_REG29__DDATAHI 3
+#define CP0_REG29__TAGHI 0
+#define CP0_REG29__DATAHI 1
+#define CP0_REG29__TAGHI1 2
+#define CP0_REG29__DATAHI1 3
+#define CP0_REG29__TAGHI2 4
+#define CP0_REG29__DATAHI2 5
+#define CP0_REG29__TAGHI3 6
+#define CP0_REG29__DATAHI3 7
/* CP0 Register 30 */
#define CP0_REG30__ERROREPC 0
/* CP0 Register 31 */
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 6f5eed7..95cb473 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7548,17 +7548,17 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_29:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG29__TAGHI:
+ case CP0_REG29__TAGHI1:
+ case CP0_REG29__TAGHI2:
+ case CP0_REG29__TAGHI3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagHi));
register_name = "TagHi";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG29__DATAHI:
+ case CP0_REG29__DATAHI1:
+ case CP0_REG29__DATAHI2:
+ case CP0_REG29__DATAHI3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataHi));
register_name = "DataHi";
break;
@@ -8302,17 +8302,17 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_29:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG29__TAGHI:
+ case CP0_REG29__TAGHI1:
+ case CP0_REG29__TAGHI2:
+ case CP0_REG29__TAGHI3:
gen_helper_mtc0_taghi(cpu_env, arg);
register_name = "TagHi";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG29__DATAHI:
+ case CP0_REG29__DATAHI1:
+ case CP0_REG29__DATAHI2:
+ case CP0_REG29__DATAHI3:
gen_helper_mtc0_datahi(cpu_env, arg);
register_name = "DataHi";
break;
@@ -9038,17 +9038,17 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_29:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG29__TAGHI:
+ case CP0_REG29__TAGHI1:
+ case CP0_REG29__TAGHI2:
+ case CP0_REG29__TAGHI3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagHi));
register_name = "TagHi";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG29__DATAHI:
+ case CP0_REG29__DATAHI1:
+ case CP0_REG29__DATAHI2:
+ case CP0_REG29__DATAHI3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataHi));
register_name = "DataHi";
break;
@@ -9778,17 +9778,17 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_29:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG29__TAGHI:
+ case CP0_REG29__TAGHI1:
+ case CP0_REG29__TAGHI2:
+ case CP0_REG29__TAGHI3:
gen_helper_mtc0_taghi(cpu_env, arg);
register_name = "TagHi";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG29__DATAHI:
+ case CP0_REG29__DATAHI1:
+ case CP0_REG29__DATAHI2:
+ case CP0_REG29__DATAHI3:
gen_helper_mtc0_datahi(cpu_env, arg);
register_name = "DataHi";
break;
--
2.7.4
- [Qemu-devel] [PATCH 11/26] target/mips: Clean up handling of CP0 register 12, (continued)
- [Qemu-devel] [PATCH 11/26] target/mips: Clean up handling of CP0 register 12, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 05/26] target/mips: Clean up handling of CP0 register 6, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 19/26] target/mips: Clean up handling of CP0 register 24, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 22/26] target/mips: Clean up handling of CP0 register 27, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 25/26] target/mips: Clean up handling of CP0 register 30, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 17/26] target/mips: Clean up handling of CP0 register 20, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 21/26] target/mips: Clean up handling of CP0 register 26, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 18/26] target/mips: Clean up handling of CP0 register 23, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 26/26] target/mips: Clean up handling of CP0 register 31, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 23/26] target/mips: Clean up handling of CP0 register 28, Aleksandar Markovic, 2019/08/22
- [Qemu-devel] [PATCH 24/26] target/mips: Clean up handling of CP0 register 29,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH 20/26] target/mips: Clean up handling of CP0 register 25, Aleksandar Markovic, 2019/08/22