Re: [Qemu-devel] [PATCH v2 16/68] target/arm: Convert CLZ

[Peter Maydell]

On Mon, 19 Aug 2019 at 22:38, Richard Henderson
<address@hidden> wrote:
>
> Document our choice about the T32 CONSTRAINED UNPREDICTABLE behaviour.
> This matches the undocumented choice made by the legacy decoder.
>
> Signed-off-by: Richard Henderson <address@hidden>
> diff --git a/target/arm/a32.decode b/target/arm/a32.decode
> index 6cb9c16e2f..182f2b6725 100644
> --- a/target/arm/a32.decode
> +++ b/target/arm/a32.decode
> @@ -29,6 +29,7 @@
>  &s_rrrr          s rd rn rm ra
>  &rrrr            rd rn rm ra
>  &rrr             rd rn rm
> +&rr              rd rm
>  &r               rm
>  &msr_reg         rn r mask
>  &mrs_reg         rd r
> @@ -197,6 +198,7 @@ CRC32CW          .... 0001 0100 .... .... 0010 0100 ....  
>     @rndm
>  %sysm            8:1 16:4
>
>  @rm              ---- .... .... .... .... .... .... rm:4      &r
> +@rdm             ---- .... .... .... rd:4 .... .... rm:4      &rr
>
>  MRS_bank         ---- 0001 0 r:1 00 .... rd:4 001. 0000 0000  &mrs_bank %sysm
>  MSR_bank         ---- 0001 0 r:1 10 .... 1111 001. 0000 rn:4  &msr_bank %sysm
> @@ -207,3 +209,5 @@ MSR_reg          ---- 0001 0 r:1 10 mask:4 1111 0000 0000 
> rn:4  &msr_reg
>  BX               .... 0001 0010 1111 1111 1111 0001 ....      @rm
>  BXJ              .... 0001 0010 1111 1111 1111 0010 ....      @rm
>  BLX_r            .... 0001 0010 1111 1111 1111 0011 ....      @rm
> +
> +CLZ              .... 0001 0110 1111 .... 1111 0001 ....      @rdm

Same question about ---- vs .... for the cond field.
Otherwise
Reviewed-by: Peter Maydell <address@hidden>

thanks
-- PMM