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[Qemu-devel] [PATCH v2 27/30] target/mips: Clean up handling of CP0 regi
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v2 27/30] target/mips: Clean up handling of CP0 register 28 |
Date: |
Wed, 28 Aug 2019 18:26:51 +0200 |
From: Aleksandar Markovic <address@hidden>
Clean up handling of CP0 register 28.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/cpu.h | 24 +++++++++++--------
target/mips/translate.c | 64 ++++++++++++++++++++++++-------------------------
2 files changed, 46 insertions(+), 42 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 9b15b09..b71b6f4 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -235,12 +235,12 @@ typedef struct mips_def_t mips_def_t;
*
* 0 DataLo DataHi ErrorEPC DESAVE
* 1 TagLo TagHi
- * 2 DataLo DataHi KScratch<n>
- * 3 TagLo TagHi KScratch<n>
- * 4 DataLo DataHi KScratch<n>
- * 5 TagLo TagHi KScratch<n>
- * 6 DataLo DataHi KScratch<n>
- * 7 TagLo TagHi KScratch<n>
+ * 2 DataLo1 DataHi KScratch<n>
+ * 3 TagLo1 TagHi KScratch<n>
+ * 4 DataLo2 DataHi KScratch<n>
+ * 5 TagLo2 TagHi KScratch<n>
+ * 6 DataLo3 DataHi KScratch<n>
+ * 7 TagLo3 TagHi KScratch<n>
*
*/
#define CP0_REGISTER_00 0
@@ -429,10 +429,14 @@ typedef struct mips_def_t mips_def_t;
/* CP0 Register 27 */
#define CP0_REG27__CACHERR 0
/* CP0 Register 28 */
-#define CP0_REG28__ITAGLO 0
-#define CP0_REG28__IDATALO 1
-#define CP0_REG28__DTAGLO 2
-#define CP0_REG28__DDATALO 3
+#define CP0_REG28__TAGLO 0
+#define CP0_REG28__DATALO 1
+#define CP0_REG28__TAGLO1 2
+#define CP0_REG28__DATALO1 3
+#define CP0_REG28__TAGLO2 4
+#define CP0_REG28__DATALO2 5
+#define CP0_REG28__TAGLO3 6
+#define CP0_REG28__DATALO3 7
/* CP0 Register 29 */
#define CP0_REG29__IDATAHI 1
#define CP0_REG29__DDATAHI 3
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2e5df0b..807151b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7524,10 +7524,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
{
TCGv_i64 tmp = tcg_temp_new_i64();
tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUMIPSState,
CP0_TagLo));
@@ -7536,10 +7536,10 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
}
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo));
register_name = "DataLo";
break;
@@ -8284,17 +8284,17 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
gen_helper_mtc0_taglo(cpu_env, arg);
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_helper_mtc0_datalo(cpu_env, arg);
register_name = "DataLo";
break;
@@ -9021,17 +9021,17 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_TagLo));
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_DataLo));
register_name = "DataLo";
break;
@@ -9762,17 +9762,17 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int
reg, int sel)
break;
case CP0_REGISTER_28:
switch (sel) {
- case 0:
- case 2:
- case 4:
- case 6:
+ case CP0_REG28__TAGLO:
+ case CP0_REG28__TAGLO1:
+ case CP0_REG28__TAGLO2:
+ case CP0_REG28__TAGLO3:
gen_helper_mtc0_taglo(cpu_env, arg);
register_name = "TagLo";
break;
- case 1:
- case 3:
- case 5:
- case 7:
+ case CP0_REG28__DATALO:
+ case CP0_REG28__DATALO1:
+ case CP0_REG28__DATALO2:
+ case CP0_REG28__DATALO3:
gen_helper_mtc0_datalo(cpu_env, arg);
register_name = "DataLo";
break;
--
2.7.4
- [Qemu-devel] [PATCH v2 16/30] target/mips: Clean up handling of CP0 register 15, (continued)
- [Qemu-devel] [PATCH v2 16/30] target/mips: Clean up handling of CP0 register 15, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 20/30] target/mips: Clean up handling of CP0 register 19, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 15/30] target/mips: Clean up handling of CP0 register 14, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 08/30] target/mips: Clean up handling of CP0 register 7, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 17/30] target/mips: Clean up handling of CP0 register 16, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 11/30] target/mips: Clean up handling of CP0 register 10, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 23/30] target/mips: Clean up handling of CP0 register 24, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 19/30] target/mips: Clean up handling of CP0 register 18, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 21/30] target/mips: Clean up handling of CP0 register 20, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 22/30] target/mips: Clean up handling of CP0 register 23, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 27/30] target/mips: Clean up handling of CP0 register 28,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v2 24/30] target/mips: Clean up handling of CP0 register 25, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 29/30] target/mips: Clean up handling of CP0 register 30, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 28/30] target/mips: Clean up handling of CP0 register 29, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 30/30] target/mips: Clean up handling of CP0 register 31, Aleksandar Markovic, 2019/08/28
- [Qemu-devel] [PATCH v2 25/30] target/mips: Clean up handling of CP0 register 26, Aleksandar Markovic, 2019/08/28
- Re: [Qemu-devel] [EXTERNAL][PATCH v2 00/30] Clean up handling of configuration register CP0, Aleksandar Rikalo, 2019/08/28