[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 07/68] hw/timer/arm_timer.c: Switch to transaction-based ptimer AP
From: |
Peter Maydell |
Subject: |
[PULL 07/68] hw/timer/arm_timer.c: Switch to transaction-based ptimer API |
Date: |
Mon, 14 Oct 2019 17:03:03 +0100 |
Switch the arm_timer.c code away from bottom-half based ptimers
to the new transaction-based ptimer API. This just requires
adding begin/commit calls around the various arms of
arm_timer_write() that modify the ptimer state, and using the
new ptimer_init() function to create the timer.
Fixes: https://bugs.launchpad.net/qemu/+bug/1777777
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
hw/timer/arm_timer.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index dc33ab31050..af524fabf75 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -14,7 +14,6 @@
#include "hw/irq.h"
#include "hw/ptimer.h"
#include "hw/qdev-properties.h"
-#include "qemu/main-loop.h"
#include "qemu/module.h"
#include "qemu/log.h"
@@ -75,7 +74,10 @@ static uint32_t arm_timer_read(void *opaque, hwaddr offset)
}
}
-/* Reset the timer limit after settings have changed. */
+/*
+ * Reset the timer limit after settings have changed.
+ * May only be called from inside a ptimer transaction block.
+ */
static void arm_timer_recalibrate(arm_timer_state *s, int reload)
{
uint32_t limit;
@@ -102,13 +104,16 @@ static void arm_timer_write(void *opaque, hwaddr offset,
switch (offset >> 2) {
case 0: /* TimerLoad */
s->limit = value;
+ ptimer_transaction_begin(s->timer);
arm_timer_recalibrate(s, 1);
+ ptimer_transaction_commit(s->timer);
break;
case 1: /* TimerValue */
/* ??? Linux seems to want to write to this readonly register.
Ignore it. */
break;
case 2: /* TimerControl */
+ ptimer_transaction_begin(s->timer);
if (s->control & TIMER_CTRL_ENABLE) {
/* Pause the timer if it is running. This may cause some
inaccuracy dure to rounding, but avoids a whole lot of other
@@ -128,13 +133,16 @@ static void arm_timer_write(void *opaque, hwaddr offset,
/* Restart the timer if still enabled. */
ptimer_run(s->timer, (s->control & TIMER_CTRL_ONESHOT) != 0);
}
+ ptimer_transaction_commit(s->timer);
break;
case 3: /* TimerIntClr */
s->int_level = 0;
break;
case 6: /* TimerBGLoad */
s->limit = value;
+ ptimer_transaction_begin(s->timer);
arm_timer_recalibrate(s, 0);
+ ptimer_transaction_commit(s->timer);
break;
default:
qemu_log_mask(LOG_GUEST_ERROR,
@@ -166,14 +174,12 @@ static const VMStateDescription vmstate_arm_timer = {
static arm_timer_state *arm_timer_init(uint32_t freq)
{
arm_timer_state *s;
- QEMUBH *bh;
s = (arm_timer_state *)g_malloc0(sizeof(arm_timer_state));
s->freq = freq;
s->control = TIMER_CTRL_IE;
- bh = qemu_bh_new(arm_timer_tick, s);
- s->timer = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT);
+ s->timer = ptimer_init(arm_timer_tick, s, PTIMER_POLICY_DEFAULT);
vmstate_register(NULL, -1, &vmstate_arm_timer, s);
return s;
}
--
2.20.1
- [PULL 00/68] target-arm queue, Peter Maydell, 2019/10/14
- [PULL 02/68] intc/arm_gic: Support IRQ injection for more than 256 vpus, Peter Maydell, 2019/10/14
- [PULL 03/68] ARM: KVM: Check KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 for smp_cpus > 256, Peter Maydell, 2019/10/14
- [PULL 01/68] linux headers: update against v5.4-rc1, Peter Maydell, 2019/10/14
- [PULL 04/68] ptimer: Rename ptimer_init() to ptimer_init_with_bh(), Peter Maydell, 2019/10/14
- [PULL 05/68] ptimer: Provide new transaction-based API, Peter Maydell, 2019/10/14
- [PULL 07/68] hw/timer/arm_timer.c: Switch to transaction-based ptimer API,
Peter Maydell <=
- [PULL 06/68] tests/ptimer-test: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 08/68] hw/arm/musicpal.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 09/68] hw/timer/allwinner-a10-pit.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 10/68] hw/timer/arm_mptimer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 11/68] hw/timer/cmsdk-apb-dualtimer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 12/68] hw/timer/cmsdk-apb-timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 13/68] hw/timer/digic-timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 15/68] hw/timer/exynos4210_mct.c: Switch LFRC to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 16/68] hw/timer/exynos4210_mct.c: Switch ltick to transaction-based ptimer API, Peter Maydell, 2019/10/14
- [PULL 14/68] hw/timer/exynos4210_mct.c: Switch GFRC to transaction-based ptimer API, Peter Maydell, 2019/10/14