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[PULL 59/68] aspeed: Add an AST2600 eval board
From: |
Peter Maydell |
Subject: |
[PULL 59/68] aspeed: Add an AST2600 eval board |
Date: |
Mon, 14 Oct 2019 17:03:55 +0100 |
From: Cédric Le Goater <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c | 23 +++++++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index 02073a6b4d6..f49bc7081e4 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -18,6 +18,7 @@ typedef struct AspeedBoardConfig {
const char *desc;
const char *soc_name;
uint32_t hw_strap1;
+ uint32_t hw_strap2;
const char *fmc_model;
const char *spi_model;
uint32_t num_cs;
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 52993f84b46..65453278a75 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -88,6 +88,10 @@ struct AspeedBoardState {
/* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */
#define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1
+/* AST2600 evb hardware value */
+#define AST2600_EVB_HW_STRAP1 0x000000C0
+#define AST2600_EVB_HW_STRAP2 0x00000003
+
/*
* The max ram region is for firmwares that scan the address space
* with load/store to guess how much RAM the SoC has.
@@ -187,6 +191,8 @@ static void aspeed_board_init(MachineState *machine,
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
&error_abort);
+ object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap2, "hw-strap2",
+ &error_abort);
object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus",
@@ -308,6 +314,12 @@ static void ast2500_evb_i2c_init(AspeedBoardState *bmc)
i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338",
0x32);
}
+static void ast2600_evb_i2c_init(AspeedBoardState *bmc)
+{
+ /* Start with some devices on our I2C busses */
+ ast2500_evb_i2c_init(bmc);
+}
+
static void romulus_bmc_i2c_init(AspeedBoardState *bmc)
{
AspeedSoCState *soc = &bmc->soc;
@@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = {
.num_cs = 2,
.i2c_init = witherspoon_bmc_i2c_init,
.ram = 512 * MiB,
+ }, {
+ .name = MACHINE_TYPE_NAME("ast2600-evb"),
+ .desc = "Aspeed AST2600 EVB (Cortex A7)",
+ .soc_name = "ast2600-a0",
+ .hw_strap1 = AST2600_EVB_HW_STRAP1,
+ .hw_strap2 = AST2600_EVB_HW_STRAP2,
+ .fmc_model = "w25q512jv",
+ .spi_model = "mx66u51235f",
+ .num_cs = 1,
+ .i2c_init = ast2600_evb_i2c_init,
+ .ram = 2 * GiB,
},
};
--
2.20.1
- [PULL 47/68] aspeed/sdmc: Introduce an object class per SoC, (continued)
- [PULL 47/68] aspeed/sdmc: Introduce an object class per SoC, Peter Maydell, 2019/10/14
- [PULL 48/68] aspeed/sdmc: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 50/68] hw: wdt_aspeed: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 49/68] watchdog/aspeed: Introduce an object class per SoC, Peter Maydell, 2019/10/14
- [PULL 52/68] aspeed/smc: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 51/68] aspeed/smc: Introduce segment operations, Peter Maydell, 2019/10/14
- [PULL 53/68] hw/gpio: Add in AST2600 specific implementation, Peter Maydell, 2019/10/14
- [PULL 55/68] aspeed/i2c: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 54/68] aspeed/i2c: Introduce an object class per SoC, Peter Maydell, 2019/10/14
- [PULL 58/68] m25p80: Add support for w25q512jv, Peter Maydell, 2019/10/14
- [PULL 59/68] aspeed: Add an AST2600 eval board,
Peter Maydell <=
- Re: [PULL 59/68] aspeed: Add an AST2600 eval board, Philippe Mathieu-Daudé, 2019/10/16
- Re: [PULL 59/68] aspeed: Add an AST2600 eval board, Cédric Le Goater, 2019/10/16
- Re: [PULL 59/68] aspeed: Add an AST2600 eval board, Philippe Mathieu-Daudé, 2019/10/16
[PULL 56/68] aspeed: Introduce an object class per SoC, Peter Maydell, 2019/10/14
[PULL 57/68] aspeed/soc: Add AST2600 support, Peter Maydell, 2019/10/14
[PULL 60/68] aspeed: Parameterise number of MACs, Peter Maydell, 2019/10/14