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[PULL 31/51] hw/timer/slavio_timer.c: Switch to transaction-based ptimer
From: |
Peter Maydell |
Subject: |
[PULL 31/51] hw/timer/slavio_timer.c: Switch to transaction-based ptimer API |
Date: |
Thu, 24 Oct 2019 17:27:04 +0100 |
Switch the slavio_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API. This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/timer/slavio_timer.c | 20 ++++++++++++++++----
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c
index 890dd53f8d8..c55e8d0bf42 100644
--- a/hw/timer/slavio_timer.c
+++ b/hw/timer/slavio_timer.c
@@ -30,7 +30,6 @@
#include "hw/sysbus.h"
#include "migration/vmstate.h"
#include "trace.h"
-#include "qemu/main-loop.h"
#include "qemu/module.h"
/*
@@ -213,6 +212,7 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
saddr = addr >> 2;
switch (saddr) {
case TIMER_LIMIT:
+ ptimer_transaction_begin(t->timer);
if (slavio_timer_is_user(tc)) {
uint64_t count;
@@ -234,6 +234,7 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
ptimer_set_limit(t->timer, LIMIT_TO_PERIODS(t->limit), 1);
}
}
+ ptimer_transaction_commit(t->timer);
break;
case TIMER_COUNTER:
if (slavio_timer_is_user(tc)) {
@@ -245,7 +246,9 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
t->reached = 0;
count = ((uint64_t)t->counthigh) << 32 | t->count;
trace_slavio_timer_mem_writel_limit(timer_index, count);
+ ptimer_transaction_begin(t->timer);
ptimer_set_count(t->timer, LIMIT_TO_PERIODS(t->limit - count));
+ ptimer_transaction_commit(t->timer);
} else {
trace_slavio_timer_mem_writel_counter_invalid();
}
@@ -253,13 +256,16 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
case TIMER_COUNTER_NORST:
// set limit without resetting counter
t->limit = val & TIMER_MAX_COUNT32;
+ ptimer_transaction_begin(t->timer);
if (t->limit == 0) { /* free-run */
ptimer_set_limit(t->timer, LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 0);
} else {
ptimer_set_limit(t->timer, LIMIT_TO_PERIODS(t->limit), 0);
}
+ ptimer_transaction_commit(t->timer);
break;
case TIMER_STATUS:
+ ptimer_transaction_begin(t->timer);
if (slavio_timer_is_user(tc)) {
// start/stop user counter
if (val & 1) {
@@ -271,6 +277,7 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
}
}
t->run = val & 1;
+ ptimer_transaction_commit(t->timer);
break;
case TIMER_MODE:
if (timer_index == 0) {
@@ -280,6 +287,7 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
unsigned int processor = 1 << i;
CPUTimerState *curr_timer = &s->cputimer[i + 1];
+ ptimer_transaction_begin(curr_timer->timer);
// check for a change in timer mode for this processor
if ((val & processor) != (s->cputimer_mode & processor)) {
if (val & processor) { // counter -> user timer
@@ -306,6 +314,7 @@ static void slavio_timer_mem_writel(void *opaque, hwaddr
addr,
trace_slavio_timer_mem_writel_mode_counter(timer_index);
}
}
+ ptimer_transaction_commit(curr_timer->timer);
}
} else {
trace_slavio_timer_mem_writel_mode_invalid();
@@ -365,10 +374,12 @@ static void slavio_timer_reset(DeviceState *d)
curr_timer->count = 0;
curr_timer->reached = 0;
if (i <= s->num_cpus) {
+ ptimer_transaction_begin(curr_timer->timer);
ptimer_set_limit(curr_timer->timer,
LIMIT_TO_PERIODS(TIMER_MAX_COUNT32), 1);
ptimer_run(curr_timer->timer, 0);
curr_timer->run = 1;
+ ptimer_transaction_commit(curr_timer->timer);
}
}
s->cputimer_mode = 0;
@@ -378,7 +389,6 @@ static void slavio_timer_init(Object *obj)
{
SLAVIO_TIMERState *s = SLAVIO_TIMER(obj);
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
- QEMUBH *bh;
unsigned int i;
TimerContext *tc;
@@ -390,9 +400,11 @@ static void slavio_timer_init(Object *obj)
tc->s = s;
tc->timer_index = i;
- bh = qemu_bh_new(slavio_timer_irq, tc);
- s->cputimer[i].timer = ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT);
+ s->cputimer[i].timer = ptimer_init(slavio_timer_irq, tc,
+ PTIMER_POLICY_DEFAULT);
+ ptimer_transaction_begin(s->cputimer[i].timer);
ptimer_set_period(s->cputimer[i].timer, TIMER_PERIOD);
+ ptimer_transaction_commit(s->cputimer[i].timer);
size = i == 0 ? SYS_TIMER_SIZE : CPU_TIMER_SIZE;
snprintf(timer_name, sizeof(timer_name), "timer-%i", i);
--
2.20.1
- [PULL 23/51] target/arm: Rebuild hflags for M-profile NVIC, (continued)
- [PULL 23/51] target/arm: Rebuild hflags for M-profile NVIC, Peter Maydell, 2019/10/24
- [PULL 24/51] linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN, Peter Maydell, 2019/10/24
- [PULL 25/51] linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN, Peter Maydell, 2019/10/24
- [PULL 26/51] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/24
- [PULL 27/51] hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 28/51] hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 29/51] hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 30/51] hw/timer/slavio_timer: Remove useless check for NULL t->timer, Peter Maydell, 2019/10/24
- [PULL 32/51] hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 34/51] hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 31/51] hw/timer/slavio_timer.c: Switch to transaction-based ptimer API,
Peter Maydell <=
- [PULL 33/51] hw/m68k/mcf5206.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 35/51] target/arm/monitor: Introduce qmp_query_cpu_model_expansion, Peter Maydell, 2019/10/24
- [PULL 36/51] tests: arm: Introduce cpu feature tests, Peter Maydell, 2019/10/24
- [PULL 37/51] target/arm: Allow SVE to be disabled via a CPU property, Peter Maydell, 2019/10/24
- [PULL 40/51] target/arm/kvm64: max cpu: Enable SVE when available, Peter Maydell, 2019/10/24
- [PULL 41/51] target/arm/kvm: scratch vcpu: Preserve input kvm_vcpu_init features, Peter Maydell, 2019/10/24
- [PULL 39/51] target/arm/kvm64: Add kvm_arch_get/put_sve, Peter Maydell, 2019/10/24
- [PULL 38/51] target/arm/cpu64: max cpu: Introduce sve<N> properties, Peter Maydell, 2019/10/24
- [PULL 44/51] hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor, Peter Maydell, 2019/10/24
- [PULL 45/51] hw/arm/bcm2835_peripherals: Use the thermal sensor block, Peter Maydell, 2019/10/24