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[PATCH 5/5] hw/ppc/pnv_xscom: add PBA BARs for Power8 slw image
From: |
Balamuruhan S |
Subject: |
[PATCH 5/5] hw/ppc/pnv_xscom: add PBA BARs for Power8 slw image |
Date: |
Tue, 19 Nov 2019 23:20:56 +0530 |
slw base and size mask are accessed during boot in homer_init_chip(),
so include BAR2 and BARMASK2 for Power8.
Signed-off-by: Balamuruhan S <address@hidden>
---
hw/ppc/pnv_xscom.c | 10 ++++++++--
include/hw/ppc/pnv.h | 4 ++++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index f797a5ec7d..828a2e2a5a 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -38,8 +38,10 @@
/* PBA BARs */
#define P8_PBA_BAR0 0x2013f00
+#define P8_PBA_BAR2 0x2013f02
#define P8_PBA_BAR3 0x2013f03
#define P8_PBA_BARMASK0 0x2013f04
+#define P8_PBA_BARMASK2 0x2013f06
#define P8_PBA_BARMASK3 0x2013f07
#define P9_PBA_BAR0 0x5012b00
#define P9_PBA_BAR2 0x5012b02
@@ -49,6 +51,7 @@
/* Mask to calculate Homer/Occ size */
#define HOMER_SIZE_MASK 0x0000000000300000ull
#define OCC_SIZE_MASK 0x0000000000700000ull
+#define SLW_SIZE_MASK 0x0
static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
{
@@ -115,6 +118,11 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t
pcba)
}
return 0;
+ case P8_PBA_BAR2: /* P8 slw image */
+ return PNV_SLW_IMAGE_BASE(chip);
+ case P8_PBA_BARMASK2: /* P8 slw image size is 1MB and mask is zero*/
+ return SLW_SIZE_MASK;
+
case 0x1010c00: /* PIBAM FIR */
case 0x1010c03: /* PIBAM FIR MASK */
@@ -135,9 +143,7 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t
pcba)
case 0x202000f: /* ADU stuff, receive status register*/
return 0;
case 0x2013f01: /* PBA stuff */
- case 0x2013f02: /* PBA stuff */
case 0x2013f05: /* PBA stuff */
- case 0x2013f06: /* PBA stuff */
return 0;
case 0x2013028: /* CAPP stuff */
case 0x201302a: /* CAPP stuff */
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index e9ed8b928a..bd22dbf8a9 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -212,6 +212,10 @@ void pnv_bmc_powerdown(IPMIBmc *bmc);
#define PNV_HOMER_BASE(chip) \
(0x7ffd800000ull + ((uint64_t)PNV_CHIP_INDEX(chip)) * PNV_HOMER_SIZE)
+#define PNV_SLW_SIZE 0x0000000000100000ull
+#define PNV_SLW_IMAGE_BASE(chip) \
+ (0x2ffda00000ull + ((uint64_t)PNV_CHIP_INDEX(chip)) * PNV_SLW_SIZE)
+
/*
* XSCOM 0x20109CA defines the ICP BAR:
--
2.14.5
- Re: [PATCH 2/5] hw/ppc/pnv_xscom: PBA bar mask values are incorrect with homer/occ sizes, (continued)
Re: [PATCH 2/5] hw/ppc/pnv_xscom: PBA bar mask values are incorrect with homer/occ sizes, Cédric Le Goater, 2019/11/20
[PATCH 3/5] hw/ppc/pnv_xscom: Power8 occ common area is in PBA BAR 3, Balamuruhan S, 2019/11/19
[PATCH 4/5] hw/ppc/pnv_xscom: occ common area to be mapped only once, Balamuruhan S, 2019/11/19
[PATCH 5/5] hw/ppc/pnv_xscom: add PBA BARs for Power8 slw image,
Balamuruhan S <=
Re: [PATCH 0/5] ppc/pnv: fix Homer/Occ mappings on multichip systems, Cédric Le Goater, 2019/11/20