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[PULL 0/4] x86 updates for QEMU 4.2-rc
From: |
Paolo Bonzini |
Subject: |
[PULL 0/4] x86 updates for QEMU 4.2-rc |
Date: |
Thu, 21 Nov 2019 16:36:45 +0100 |
The following changes since commit 39e2821077e6dcf788b7c2a9ef50970ec7995437:
Update version for v4.2.0-rc2 release (2019-11-19 19:34:10 +0000)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to 02fa60d10137ed2ef17534718d7467e0d2170142:
i386: Add -noTSX aliases for hle=off, rtm=off CPU models (2019-11-21 16:35:05
+0100)
----------------------------------------------------------------
* x86 updates for Intel errata (myself, Eduardo)
* the big ugly list of x86 VMX features, which was targeted for 5.0 but
caused a Libvirt regression (myself)
----------------------------------------------------------------
The diffstat is scary, but 90% of the patches are adding initializers to
the CPU model definitions.
Eduardo Habkost (2):
i386: Add new versions of Skylake/Cascadelake/Icelake without TSX
i386: Add -noTSX aliases for hle=off, rtm=off CPU models
Paolo Bonzini (2):
target/i386: add VMX features to named CPU models
target/i386: add support for MSR_IA32_TSX_CTRL
target/i386/cpu.c | 759 +++++++++++++++++++++++++++++++++++++++++++++++++-
target/i386/cpu.h | 5 +
target/i386/kvm.c | 13 +
target/i386/machine.c | 20 ++
4 files changed, 796 insertions(+), 1 deletion(-)
--
1.8.3.1
- [PULL 0/4] x86 updates for QEMU 4.2-rc,
Paolo Bonzini <=
- [PULL 2/4] target/i386: add support for MSR_IA32_TSX_CTRL, Paolo Bonzini, 2019/11/21
- [PULL 3/4] i386: Add new versions of Skylake/Cascadelake/Icelake without TSX, Paolo Bonzini, 2019/11/21
- [PULL 4/4] i386: Add -noTSX aliases for hle=off, rtm=off CPU models, Paolo Bonzini, 2019/11/21
- [PULL 1/4] target/i386: add VMX features to named CPU models, Paolo Bonzini, 2019/11/21
- Re: [PULL 0/4] x86 updates for QEMU 4.2-rc, no-reply, 2019/11/21
- Re: [PULL 0/4] x86 updates for QEMU 4.2-rc, Peter Maydell, 2019/11/21