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[PULL 1/5] target/i386: add two missing VMX features for Skylake and Cas
From: |
Paolo Bonzini |
Subject: |
[PULL 1/5] target/i386: add two missing VMX features for Skylake and CascadeLake Server |
Date: |
Tue, 26 Nov 2019 09:59:32 +0100 |
They are present in client (Core) Skylake but pasted wrong into the server
SKUs.
Reported-by: Dr. David Alan Gilbert <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
target/i386/cpu.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 730fb28b67..69f518a21a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3006,7 +3006,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
VMX_SECONDARY_EXEC_RDRAND_EXITING |
VMX_SECONDARY_EXEC_ENABLE_INVPCID |
- VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS,
+ VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS
|
+ VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Skylake)",
.versions = (X86CPUVersionDefinition[]) {
@@ -3131,7 +3132,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
VMX_SECONDARY_EXEC_APIC_REGISTER_VIRT |
VMX_SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
VMX_SECONDARY_EXEC_RDRAND_EXITING |
VMX_SECONDARY_EXEC_ENABLE_INVPCID |
- VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS,
+ VMX_SECONDARY_EXEC_ENABLE_VMFUNC | VMX_SECONDARY_EXEC_SHADOW_VMCS
|
+ VMX_SECONDARY_EXEC_RDSEED_EXITING | VMX_SECONDARY_EXEC_ENABLE_PML,
.xlevel = 0x80000008,
.model_id = "Intel Xeon Processor (Cascadelake)",
.versions = (X86CPUVersionDefinition[]) {
--
2.21.0
- [PULL 0/5] i386 patches for QEMU 4.2-rc, Paolo Bonzini, 2019/11/26
- [PULL 1/5] target/i386: add two missing VMX features for Skylake and CascadeLake Server,
Paolo Bonzini <=
- [PULL 2/5] hvf: non-RAM, non-ROMD memory ranges are now correctly mapped in, Paolo Bonzini, 2019/11/26
- [PULL 3/5] hvf: remove TSC synchronization code because it isn't fully complete, Paolo Bonzini, 2019/11/26
- [PULL 4/5] hvf: correctly handle REX prefix in relation to legacy prefixes, Paolo Bonzini, 2019/11/26
- [PULL 5/5] hvf: more accurately match SDM when setting CR0 and PDPTE registers, Paolo Bonzini, 2019/11/26
- Re: [PULL 0/5] i386 patches for QEMU 4.2-rc, no-reply, 2019/11/26