Re: [PATCH] hw/ppc/prep: Remove the deprecated "prep" machine and the OpenHackware BIOS

[Philippe Mathieu-Daudé]

On 12/3/19 10:15 AM, Thomas Huth wrote:
> On 03/12/2019 09.51, Philippe Mathieu-Daudé wrote:
> > On 12/3/19 9:25 AM, Thomas Huth wrote:
> > > On 03/12/2019 08.45, Philippe Mathieu-Daudé wrote:
> > > > On 12/3/19 8:29 AM, Thomas Huth wrote:
> > > > > It's been deprecated since QEMU v3.1. The 40p machine should be
> > > > > used nowadays instead.
> > > > >
> > > > > Signed-off-by: Thomas Huth <address@hidden>
> > > > > ---
> > > > >     .gitmodules                |   3 -
> > > > >     MAINTAINERS                |   1 -
> > > > >     Makefile                   |   2 +-
> > > > >     docs/interop/firmware.json |   3 +-
> > > > >     hw/ppc/ppc.c               |  18 --
> > > > >     hw/ppc/prep.c              | 384
> > > > > +------------------------------------
> > > > >     include/hw/ppc/ppc.h       |   1 -
> > > > >     pc-bios/README             |   3 -
> > > > >     pc-bios/ppc_rom.bin        | Bin 1048576 -> 0 bytes
> > > > >     qemu-deprecated.texi       |   6 -
> > > > >     qemu-doc.texi              |  15 +-
> > > > >     roms/openhackware          |   1 -
> > > > >     tests/boot-order-test.c    |  25 ---
> > > > >     tests/cdrom-test.c         |   2 +-
> > > > >     tests/endianness-test.c    |   2 +-
> > > > >     15 files changed, 10 insertions(+), 456 deletions(-)
> > > > >     delete mode 100644 pc-bios/ppc_rom.bin
> > > > >     delete mode 160000 roms/openhackware
> > > > [...]
> > > > > diff --git a/tests/boot-order-test.c b/tests/boot-order-test.c
> > > > > index a725bce729..4a6218a516 100644
> > > > > --- a/tests/boot-order-test.c
> > > > > +++ b/tests/boot-order-test.c
> > > > > @@ -108,30 +108,6 @@ static void test_pc_boot_order(void)
> > > > >         test_boot_orders(NULL, read_boot_order_pc, test_cases_pc);
> > > > >     }
> > > > >     -static uint8_t read_m48t59(QTestState *qts, uint64_t addr, uint16_t
> > > > > reg)
> > > > > -{
> > > > > -    qtest_writeb(qts, addr, reg & 0xff);
> > > > > -    qtest_writeb(qts, addr + 1, reg >> 8);
> > > > > -    return qtest_readb(qts, addr + 3);
> > > > > -}
> > > > > -
> > > > > -static uint64_t read_boot_order_prep(QTestState *qts)
> > > > > -{
> > > > > -    return read_m48t59(qts, 0x80000000 + 0x74, 0x34);
> > > >
> > > > I'd rather keep this generic mmio-mapped ISA test.
> > > > Maybe run it with the 40p machine?
> > >
> > > I don't think that this is possible in an easy way here. On the prep
> > > machine, the ISA bus is on a hard-coded MMIO address. On the 40p
> > > machine, the ISA bus is behind a PCI-to-ISA bridge, thus the PCI part
> > > needs to be set up first.
> >
> > The why ...

I meant "TheN why". The "..." were to continue the review comment below 
the endianness-test.c diff.

> If you don't believe me, why don't you simply try to adapt the test on
> your own to use the 40p machine instead?

I didn't meant to be rude, I'm sorry if you misunderstood me.

> > > > Maybe we can rename this as read_boot_order_mm, and the previous
> > > > read_boot_order_pc as read_boot_order_io.
> > >
> > > I don't think it makes much sense. This was completely specific to the
> > > "prep" machine, even the "40p" machine seems to prefer fw_cfg nowadays.
> > > So let's simply remove this old stuff.
> > >
> > > > diff --git a/tests/endianness-test.c b/tests/endianness-test.c
> > > > index 58527952a5..2798802c63 100644
> > > > --- a/tests/endianness-test.c
> > > > +++ b/tests/endianness-test.c
> > > > @@ -35,7 +35,7 @@ static const TestCase test_cases[] = {
> > > >         { "mips64", "malta", 0x10000000, .bswap = true },
> > > >         { "mips64el", "fulong2e", 0x1fd00000 },
> > > >         { "ppc", "g3beige", 0xfe000000, .bswap = true, .superio =
> > > > "i82378" },
> > > > -    { "ppc", "prep", 0x80000000, .bswap = true },
> > > > +    { "ppc", "40p", 0x80000000, .bswap = true },
> >
> > ... here you access the Super I/O behind the PCI bridge via MMIO?
>
> The difference is that this is an *arbitrary* address in I/O space
> there. It's not an address of a certain PCI device like the m48t59
> behind a PCI-bridge. As long as it's possible to write and read from
> this address, the test is working. Both, the "prep" and the "40p"
> machine have the "raven-pcihost" device at this address, so in this case
> the switch from "40p" to "prep" was easily possible.

Now I better understand what this test does, thanks.