Re: [PATCH v38 17/22] target/avr: Register AVR support with the rest of QEMU

[Aleksandar Markovic]

On Mon, Dec 9, 2019 at 7:31 PM Michael Rolnik <address@hidden> wrote:
>
> I prefer to remove it, as nobody uses it. what do you think? the full list is 
> in target/avr/cpu.h file
>

I have mixed filings about that.

I can just imagine someone in future might make a "superassembler"
that uses this header, and than avr info would be than missing if you
delete this hunk...

But I don't have a strong preference.

Thanks,
Aleksandar

> On Mon, Dec 9, 2019 at 8:16 PM Aleksandar Markovic <address@hidden> wrote:
>>
>>
>>
>> On Sunday, December 8, 2019, Michael Rolnik <address@hidden> wrote:
>>>
>>> Add AVR related definitions into QEMU
>>>
>>> Signed-off-by: Michael Rolnik <address@hidden>
>>> Tested-by: Philippe Mathieu-Daudé <address@hidden>
>>> Reviewed-by: Aleksandar Markovic <address@hidden>
>>> ---
>>>  qapi/machine.json          | 3 ++-
>>>  include/disas/dis-asm.h    | 6 ++++++
>>>  include/sysemu/arch_init.h | 1 +
>>>  arch_init.c                | 2 ++
>>>  4 files changed, 11 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/qapi/machine.json b/qapi/machine.json
>>> index ca26779f1a..8c6df54921 100644
>>> --- a/qapi/machine.json
>>> +++ b/qapi/machine.json
>>> @@ -21,11 +21,12 @@
>>>  #        is true even for "qemu-system-x86_64".
>>>  #
>>>  # ppcemb: dropped in 3.1
>>> +# avr: since 5.0
>>>  #
>>>  # Since: 3.0
>>>  ##
>>>  { 'enum' : 'SysEmuTarget',
>>> -  'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32',
>>> +  'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 
>>> 'lm32',
>>>
>>>               'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64',
>>>               'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc',
>>>               'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4',
>>> diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
>>> index e9c7dd8eb4..8bedce17ac 100644
>>> --- a/include/disas/dis-asm.h
>>> +++ b/include/disas/dis-asm.h
>>> @@ -211,6 +211,12 @@ enum bfd_architecture
>>>  #define bfd_mach_m32r          0  /* backwards compatibility */
>>>    bfd_arch_mn10200,    /* Matsushita MN10200 */
>>>    bfd_arch_mn10300,    /* Matsushita MN10300 */
>>> +  bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
>>> +#define bfd_mach_avr1          1
>>> +#define bfd_mach_avr2          2
>>> +#define bfd_mach_avr3          3
>>> +#define bfd_mach_avr4          4
>>> +#define bfd_mach_avr5          5
>>
>>
>> Incomplete list. I already explained why in reply to v37.
>>
>>
>>>
>>>    bfd_arch_cris,       /* Axis CRIS */
>>>  #define bfd_mach_cris_v0_v10   255
>>>  #define bfd_mach_cris_v32      32
>>> diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
>>> index 62c6fe4cf1..893df26ce2 100644
>>> --- a/include/sysemu/arch_init.h
>>> +++ b/include/sysemu/arch_init.h
>>> @@ -24,6 +24,7 @@ enum {
>>>      QEMU_ARCH_NIOS2 = (1 << 17),
>>>      QEMU_ARCH_HPPA = (1 << 18),
>>>      QEMU_ARCH_RISCV = (1 << 19),
>>> +    QEMU_ARCH_AVR = (1 << 20),
>>>  };
>>>
>>>  extern const uint32_t arch_type;
>>> diff --git a/arch_init.c b/arch_init.c
>>> index 705d0b94ad..6a741165b2 100644
>>> --- a/arch_init.c
>>> +++ b/arch_init.c
>>> @@ -89,6 +89,8 @@ int graphic_depth = 32;
>>>  #define QEMU_ARCH QEMU_ARCH_UNICORE32
>>>  #elif defined(TARGET_XTENSA)
>>>  #define QEMU_ARCH QEMU_ARCH_XTENSA
>>> +#elif defined(TARGET_AVR)
>>> +#define QEMU_ARCH QEMU_ARCH_AVR
>>>  #endif
>>>
>>>  const uint32_t arch_type = QEMU_ARCH;
>>> --
>>> 2.17.2 (Apple Git-113)
>>>
>
>
> --
> Best Regards,
> Michael Rolnik