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[PULL 82/88] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method
From: |
David Gibson |
Subject: |
[PULL 82/88] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method |
Date: |
Tue, 17 Dec 2019 15:43:16 +1100 |
From: Greg Kurz <address@hidden>
The pnv_chip_core_realize() function configures the XSCOM MMIO subregion
for each core of a single chip. The base address of the subregion depends
on the CPU type. Its computation is currently open-code using the
pnv_chip_is_powerXX() helpers. This can be achieved with QOM. Introduce
a method for this in the base chip class and implement it in child classes.
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 31 ++++++++++++++++++++++++-------
include/hw/ppc/pnv.h | 1 +
2 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 35416d1b3f..16f4e407ee 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -615,6 +615,24 @@ static void pnv_chip_power9_pic_print_info(PnvChip *chip,
Monitor *mon)
pnv_psi_pic_print_info(&chip9->psi, mon);
}
+static uint64_t pnv_chip_power8_xscom_core_base(PnvChip *chip,
+ uint32_t core_id)
+{
+ return PNV_XSCOM_EX_BASE(core_id);
+}
+
+static uint64_t pnv_chip_power9_xscom_core_base(PnvChip *chip,
+ uint32_t core_id)
+{
+ return PNV9_XSCOM_EC_BASE(core_id);
+}
+
+static uint64_t pnv_chip_power10_xscom_core_base(PnvChip *chip,
+ uint32_t core_id)
+{
+ return PNV10_XSCOM_EC_BASE(core_id);
+}
+
static bool pnv_match_cpu(const char *default_type, const char *cpu_type)
{
PowerPCCPUClass *ppc_default =
@@ -1106,6 +1124,7 @@ static void pnv_chip_power8e_class_init(ObjectClass
*klass, void *data)
k->isa_create = pnv_chip_power8_isa_create;
k->dt_populate = pnv_chip_power8_dt_populate;
k->pic_print_info = pnv_chip_power8_pic_print_info;
+ k->xscom_core_base = pnv_chip_power8_xscom_core_base;
dc->desc = "PowerNV Chip POWER8E";
device_class_set_parent_realize(dc, pnv_chip_power8_realize,
@@ -1128,6 +1147,7 @@ static void pnv_chip_power8_class_init(ObjectClass
*klass, void *data)
k->isa_create = pnv_chip_power8_isa_create;
k->dt_populate = pnv_chip_power8_dt_populate;
k->pic_print_info = pnv_chip_power8_pic_print_info;
+ k->xscom_core_base = pnv_chip_power8_xscom_core_base;
dc->desc = "PowerNV Chip POWER8";
device_class_set_parent_realize(dc, pnv_chip_power8_realize,
@@ -1150,6 +1170,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass
*klass, void *data)
k->isa_create = pnv_chip_power8nvl_isa_create;
k->dt_populate = pnv_chip_power8_dt_populate;
k->pic_print_info = pnv_chip_power8_pic_print_info;
+ k->xscom_core_base = pnv_chip_power8_xscom_core_base;
dc->desc = "PowerNV Chip POWER8NVL";
device_class_set_parent_realize(dc, pnv_chip_power8_realize,
@@ -1322,6 +1343,7 @@ static void pnv_chip_power9_class_init(ObjectClass
*klass, void *data)
k->isa_create = pnv_chip_power9_isa_create;
k->dt_populate = pnv_chip_power9_dt_populate;
k->pic_print_info = pnv_chip_power9_pic_print_info;
+ k->xscom_core_base = pnv_chip_power9_xscom_core_base;
dc->desc = "PowerNV Chip POWER9";
device_class_set_parent_realize(dc, pnv_chip_power9_realize,
@@ -1403,6 +1425,7 @@ static void pnv_chip_power10_class_init(ObjectClass
*klass, void *data)
k->isa_create = pnv_chip_power10_isa_create;
k->dt_populate = pnv_chip_power10_dt_populate;
k->pic_print_info = pnv_chip_power10_pic_print_info;
+ k->xscom_core_base = pnv_chip_power10_xscom_core_base;
dc->desc = "PowerNV Chip POWER10";
device_class_set_parent_realize(dc, pnv_chip_power10_realize,
@@ -1490,13 +1513,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error
**errp)
&error_fatal);
/* Each core has an XSCOM MMIO region */
- if (pnv_chip_is_power10(chip)) {
- xscom_core_base = PNV10_XSCOM_EC_BASE(core_hwid);
- } else if (pnv_chip_is_power9(chip)) {
- xscom_core_base = PNV9_XSCOM_EC_BASE(core_hwid);
- } else {
- xscom_core_base = PNV_XSCOM_EX_BASE(core_hwid);
- }
+ xscom_core_base = pcc->xscom_core_base(chip, core_hwid);
pnv_xscom_add_subregion(chip, xscom_core_base,
&pnv_core->xscom_regs);
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 7d2402784d..17ca9a14ac 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -137,6 +137,7 @@ typedef struct PnvChipClass {
ISABus *(*isa_create)(PnvChip *chip, Error **errp);
void (*dt_populate)(PnvChip *chip, void *fdt);
void (*pic_print_info)(PnvChip *chip, Monitor *mon);
+ uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
} PnvChipClass;
#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
--
2.23.0
- [PULL 71/88] ppc/pnv: populate the DT with realized XSCOM devices, (continued)
- [PULL 71/88] ppc/pnv: populate the DT with realized XSCOM devices, David Gibson, 2019/12/16
- [PULL 67/88] target/ppc: Work [S]PURR implementation and add HV support, David Gibson, 2019/12/16
- [PULL 83/88] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 74/88] ppc/pnv: Fix OCC common area region mapping, David Gibson, 2019/12/16
- [PULL 81/88] ppc/pnv: Introduce PnvChipClass::intc_print_info() method, David Gibson, 2019/12/16
- [PULL 72/88] ppc/pnv: Make PnvXScomInterface an incomplete type, David Gibson, 2019/12/16
- [PULL 80/88] ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 76/88] ppc/pnv: Introduce PnvPsiClass::compat, David Gibson, 2019/12/16
- [PULL 84/88] ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 77/88] ppc/pnv: Drop PnvPsiClass::chip_type, David Gibson, 2019/12/16
- [PULL 82/88] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method,
David Gibson <=
- [PULL 78/88] ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat, David Gibson, 2019/12/16
- [PULL 79/88] ppc/pnv: Introduce PnvMachineClass::dt_power_mgt(), David Gibson, 2019/12/16
- [PULL 73/88] ppc/pnv: Introduce PBA registers, David Gibson, 2019/12/16
- [PULL 85/88] ppc/pnv: Drop pnv_chip_is_power9() and pnv_chip_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 86/88] ppc/pnv: Introduce PnvChipClass::xscom_pcba() method, David Gibson, 2019/12/16
- [PULL 87/88] ppc/pnv: Drop PnvChipClass::type, David Gibson, 2019/12/16
- [PULL 88/88] pseries: Update SLOF firmware image, David Gibson, 2019/12/16
- Re: [PULL 00/88] ppc-for-5.0 queue 20191217, Peter Maydell, 2019/12/17