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[PULL 02/29] hw/ssi/imx_spi: Removed unnecessary cast of rx data receive
From: |
Peter Maydell |
Subject: |
[PULL 02/29] hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave |
Date: |
Fri, 5 Jun 2020 17:49:40 +0100 |
From: Eden Mikitas <e.mikitas@gmail.com>
When inserting the value retrieved (rx) from the spi slave, rx is pushed to
rx_fifo after being cast to uint8_t. rx_fifo is a fifo32, and the rx
register the driver uses is also 32 bit. This zeroes the 24 most
significant bits of rx. This proved problematic with devices that expect to
use the whole 32 bits of the rx register.
Signed-off-by: Eden Mikitas <e.mikitas@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/ssi/imx_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 6fef5c79588..43b2f14dd28 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -206,7 +206,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
if (fifo32_is_full(&s->rx_fifo)) {
s->regs[ECSPI_STATREG] |= ECSPI_STATREG_RO;
} else {
- fifo32_push(&s->rx_fifo, (uint8_t)rx);
+ fifo32_push(&s->rx_fifo, rx);
}
if (s->burst_length <= 0) {
--
2.20.1
- [PULL 00/29] target-arm queue, Peter Maydell, 2020/06/05
- [PULL 01/29] hw/ssi/imx_spi: changed while statement to prevent underflow, Peter Maydell, 2020/06/05
- [PULL 02/29] hw/ssi/imx_spi: Removed unnecessary cast of rx data received from slave,
Peter Maydell <=
- [PULL 03/29] hw/input/pxa2xx_keypad: Replace hw_error() by qemu_log_mask(), Peter Maydell, 2020/06/05
- [PULL 04/29] hw/arm/pxa2xx: Replace printf() call by qemu_log_mask(), Peter Maydell, 2020/06/05
- [PULL 06/29] target/arm: Convert rax1 to gvec helpers, Peter Maydell, 2020/06/05
- [PULL 05/29] target/arm: Convert aes and sm4 to gvec helpers, Peter Maydell, 2020/06/05
- [PULL 07/29] target/arm: Convert sha512 and sm3 to gvec helpers, Peter Maydell, 2020/06/05
- [PULL 08/29] target/arm: Convert sha1 and sha256 to gvec helpers, Peter Maydell, 2020/06/05
- [PULL 09/29] target/arm: Split helper_crypto_sha1_3reg, Peter Maydell, 2020/06/05
- [PULL 11/29] hw/adc/stm32f2xx_adc: Correct memory region size and access size, Peter Maydell, 2020/06/05
- [PULL 13/29] docs/system: Document Aspeed boards, Peter Maydell, 2020/06/05
- [PULL 12/29] tests/acceptance: Add a boot test for the xlnx-versal-virt machine, Peter Maydell, 2020/06/05