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[PATCH v8 09/14] target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>
From: |
Aleksandar Markovic |
Subject: |
[PATCH v8 09/14] target/mips: msa: Split helpers for SUBS_S.<B|H|W|D> |
Date: |
Sat, 13 Jun 2020 17:21:28 +0200 |
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 90 ++++++++++++++++++++++++++++++++++------
target/mips/translate.c | 15 ++++++-
3 files changed, 97 insertions(+), 14 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index 05d5533dfb..a93402a2d3 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -978,6 +978,11 @@ DEF_HELPER_4(msa_hsub_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_u_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_subs_s_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_subs_s_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_subs_s_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_subs_s_d, void, env, i32, i32, i32)
+
DEF_HELPER_4(msa_ilvev_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_w, void, env, i32, i32, i32)
@@ -1074,7 +1079,6 @@ DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 84d0073918..f08beba123 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -3650,6 +3650,84 @@ void helper_msa_hsub_u_d(CPUMIPSState *env,
}
+static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ int64_t max_int = DF_MAX_INT(df);
+ int64_t min_int = DF_MIN_INT(df);
+ if (arg2 > 0) {
+ return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
+ } else {
+ return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
+ }
+}
+
+void helper_msa_subs_s_b(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_subs_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_subs_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
+ pwd->b[2] = msa_subs_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
+ pwd->b[3] = msa_subs_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
+ pwd->b[4] = msa_subs_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
+ pwd->b[5] = msa_subs_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
+ pwd->b[6] = msa_subs_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
+ pwd->b[7] = msa_subs_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
+ pwd->b[8] = msa_subs_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
+ pwd->b[9] = msa_subs_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
+ pwd->b[10] = msa_subs_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
+ pwd->b[11] = msa_subs_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
+ pwd->b[12] = msa_subs_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
+ pwd->b[13] = msa_subs_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
+ pwd->b[14] = msa_subs_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
+ pwd->b[15] = msa_subs_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
+}
+
+void helper_msa_subs_s_h(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_subs_s_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_subs_s_df(DF_HALF, pws->h[1], pwt->h[1]);
+ pwd->h[2] = msa_subs_s_df(DF_HALF, pws->h[2], pwt->h[2]);
+ pwd->h[3] = msa_subs_s_df(DF_HALF, pws->h[3], pwt->h[3]);
+ pwd->h[4] = msa_subs_s_df(DF_HALF, pws->h[4], pwt->h[4]);
+ pwd->h[5] = msa_subs_s_df(DF_HALF, pws->h[5], pwt->h[5]);
+ pwd->h[6] = msa_subs_s_df(DF_HALF, pws->h[6], pwt->h[6]);
+ pwd->h[7] = msa_subs_s_df(DF_HALF, pws->h[7], pwt->h[7]);
+}
+
+void helper_msa_subs_s_w(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_subs_s_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_subs_s_df(DF_WORD, pws->w[1], pwt->w[1]);
+ pwd->w[2] = msa_subs_s_df(DF_WORD, pws->w[2], pwt->w[2]);
+ pwd->w[3] = msa_subs_s_df(DF_WORD, pws->w[3], pwt->w[3]);
+}
+
+void helper_msa_subs_s_d(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_subs_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_subs_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
+}
+
+
/*
* Interleave
* ----------
@@ -5060,17 +5138,6 @@ MSA_TEROP_IMMU_DF(binsli, binsl)
MSA_TEROP_IMMU_DF(binsri, binsr)
#undef MSA_TEROP_IMMU_DF
-static inline int64_t msa_subs_s_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- int64_t max_int = DF_MAX_INT(df);
- int64_t min_int = DF_MIN_INT(df);
- if (arg2 > 0) {
- return (min_int + arg2 < arg1) ? arg1 - arg2 : min_int;
- } else {
- return (arg1 < max_int + arg2) ? arg1 - arg2 : max_int;
- }
-}
-
static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
uint64_t u_arg1 = UNSIGNED(arg1, df);
@@ -5235,7 +5302,6 @@ void helper_msa_ ## func ## _df(CPUMIPSState *env,
uint32_t df, \
}
MSA_BINOP_DF(subv)
-MSA_BINOP_DF(subs_s)
MSA_BINOP_DF(subs_u)
MSA_BINOP_DF(subsus_u)
MSA_BINOP_DF(subsuu_s)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index b56bdf54af..7b54d60f70 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -29298,7 +29298,20 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
}
break;
case OPC_SUBS_S_df:
- gen_helper_msa_subs_s_df(cpu_env, tdf, twd, tws, twt);
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_subs_s_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_subs_s_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_subs_s_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_subs_s_d(cpu_env, twd, tws, twt);
+ break;
+ }
break;
case OPC_MULV_df:
gen_helper_msa_mulv_df(cpu_env, tdf, twd, tws, twt);
--
2.20.1
- [PATCH v8 00/14] target/mips: MSA, FPU and other cleanups and improvements, Aleksandar Markovic, 2020/06/13
- [PATCH v8 01/14] target/mips: msa: Split helpers for MADDV.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 02/14] target/mips: msa: Split helpers for MSUBV.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 04/14] target/mips: msa: Split helpers for DPADD_U.<H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 03/14] target/mips: msa: Split helpers for DPADD_S.<H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 05/14] target/mips: msa: Split helpers for DPSUB_S.<H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 06/14] target/mips: msa: Split helpers for DPSUB_U.<H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 07/14] target/mips: msa: Split helpers for DOTP_S.<H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 08/14] target/mips: msa: Split helpers for DOTP_U.<H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 09/14] target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>,
Aleksandar Markovic <=
- [PATCH v8 10/14] target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 11/14] target/mips: msa: Split helpers for SUBSUS_U.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 12/14] target/mips: msa: Split helpers for SUBSUU_S.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 13/14] target/mips: msa: Split helpers for SUBV.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- [PATCH v8 14/14] target/mips: msa: Split helpers for MULV.<B|H|W|D>, Aleksandar Markovic, 2020/06/13
- Re: [PATCH v8 00/14] target/mips: MSA, FPU and other cleanups and improvements, Aleksandar Rikalo, 2020/06/15
- Re: [PATCH v8 00/14] target/mips: MSA, FPU and other cleanups and improvements, Aleksandar Markovic, 2020/06/15