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Re: [PATCH v2 0/2] target/mips: Add two groups of loongson-ext instructi


From: Jiaxun Yang
Subject: Re: [PATCH v2 0/2] target/mips: Add two groups of loongson-ext instructions
Date: Tue, 16 Jun 2020 19:36:06 +0800
User-agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0



在 2020/6/16 18:38, Aleksandar Markovic 写道:


уторак, 16. јун 2020., Jiaxun Yang <jiaxun.yang@flygoat.com <mailto:jiaxun.yang@flygoat.com>> је написао/ла:

    This is the sucessor of:
    "Basic TCG Loongson-3A1000 Support"

    Thanks!


Hi, Jiaxun.

Thanks for providing updated version of the series.

I wonder, given so many "#if defined(TARGET_MIPS64)" lines in this series, what would be the 32-bit processors that support Loongson EXT ASE?

Loongson GS232 core which can be found in Loongson-1A/B/C should support it.
Although I have no intension to work on QEMU support of these processors.


Thanks,
Aleksandar

    Jiaxun Yang (2):
       target/mips: Add loongson-ext lsdc2 group of instructions
       target/mips: Add loongson-ext lswc2 group of instrustions


Also, a spelling mistake in the second title.

Ahh, My bad....


      target/mips/translate.c | 437 ++++++++++++++++++++++++++++++++++++++++
      1 file changed, 437 insertions(+)

-- 2.27.0.rc2


--
- Jiaxun



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