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[PATCH 09/21] target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn
From: |
Peter Maydell |
Subject: |
[PATCH 09/21] target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn |
Date: |
Tue, 16 Jun 2020 18:08:32 +0100 |
The NeonGenOneOpFn typedef breaks with the pattern of the other
NeonGen*Fn typedefs, because it is a TCGv_i64 -> TCGv_i64 operation
but it does not have '64' in its name. Rename it to NeonGenOne64OpFn,
so that the old name is available for a TCGv_i32 -> TCGv_i32 operation
(which we will need in a subsequent commit).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.h | 2 +-
target/arm/translate-a64.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/translate.h b/target/arm/translate.h
index 62ed5c4780c..35218b3fdf1 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -374,7 +374,7 @@ typedef void NeonGenWidenFn(TCGv_i64, TCGv_i32);
typedef void NeonGenTwoOpWidenFn(TCGv_i64, TCGv_i32, TCGv_i32);
typedef void NeonGenTwoSingleOPFn(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_ptr);
typedef void NeonGenTwoDoubleOPFn(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_ptr);
-typedef void NeonGenOneOpFn(TCGv_i64, TCGv_i64);
+typedef void NeonGenOne64OpFn(TCGv_i64, TCGv_i64);
typedef void CryptoTwoOpFn(TCGv_ptr, TCGv_ptr);
typedef void CryptoThreeOpIntFn(TCGv_ptr, TCGv_ptr, TCGv_i32);
typedef void CryptoThreeOpFn(TCGv_ptr, TCGv_ptr, TCGv_ptr);
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index a0e72ad6942..7cb5fbfba80 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11917,8 +11917,8 @@ static void handle_2misc_pairwise(DisasContext *s, int
opcode, bool u,
} else {
for (pass = 0; pass < maxpass; pass++) {
TCGv_i64 tcg_op = tcg_temp_new_i64();
- NeonGenOneOpFn *genfn;
- static NeonGenOneOpFn * const fns[2][2] = {
+ NeonGenOne64OpFn *genfn;
+ static NeonGenOne64OpFn * const fns[2][2] = {
{ gen_helper_neon_addlp_s8, gen_helper_neon_addlp_u8 },
{ gen_helper_neon_addlp_s16, gen_helper_neon_addlp_u16 },
};
--
2.20.1
- [PATCH 03/21] target/arm: Convert VZIP, VUZP to decodetree, (continued)
- [PATCH 03/21] target/arm: Convert VZIP, VUZP to decodetree, Peter Maydell, 2020/06/16
- [PATCH 04/21] target/arm: Convert Neon narrowing moves to decodetree, Peter Maydell, 2020/06/16
- [PATCH 05/21] target/arm: Convert Neon 2-reg-misc VSHLL to decodetree, Peter Maydell, 2020/06/16
- [PATCH 06/21] target/arm: Convert Neon VCVT f16/f32 insns to decodetree, Peter Maydell, 2020/06/16
- [PATCH 07/21] target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree, Peter Maydell, 2020/06/16
- [PATCH 09/21] target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn,
Peter Maydell <=
- [PATCH 10/21] target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs, Peter Maydell, 2020/06/16
- [PATCH 08/21] target/arm: Convert Neon 2-reg-misc crypto operations to decodetree, Peter Maydell, 2020/06/16
- [PATCH 11/21] target/arm: Make gen_swap_half() take separate src and dest, Peter Maydell, 2020/06/16
- [PATCH 13/21] target/arm: Convert remaining simple 2-reg-misc Neon ops, Peter Maydell, 2020/06/16
- [PATCH 12/21] target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree, Peter Maydell, 2020/06/16