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Re: What is the "E10, E20_0 XXX" Flag means on arm port?
From: |
Peter Maydell |
Subject: |
Re: What is the "E10, E20_0 XXX" Flag means on arm port? |
Date: |
Wed, 17 Jun 2020 14:19:15 +0100 |
On Wed, 17 Jun 2020 at 13:54, tugouxp <13824125580@163.com> wrote:
>
> Hi folks:
>
> I Know the arm prelidge level can be divieded into EL0, EL1, EL2 and EL3,
> but i am confused by the following definition on qemu arm port.
> for example, why E10 are postfix with _0 and _1, what is this meansings?
The meanings of the different MMU indexes are described
in the long comment immediately preceding this enum.
For instance, ARMMMUIdx_E10_0 is "NS EL0 EL1&0 stage 1+2"
and ARMMMUIdx_E10_1 is "NS EL1 EL1&0 stage 1+2". See
the comment for the discussion of why we have more of
these than there are architectural "translation regimes"
as described in the Arm ARM.
thanks
-- PMM