RE: [PATCH v4 6/7] usb: Add DWC3 model

[Sai Pavan Boddu]

HI Gred,

> -----Original Message-----
> From: Gerd Hoffmann <kraxel@redhat.com>
> Sent: Monday, August 31, 2020 12:36 PM
> To: Sai Pavan Boddu <saipava@xilinx.com>
> Cc: Peter Maydell <peter.maydell@linaro.org>; Markus Armbruster
> <armbru@redhat.com>; 'Marc-André Lureau'
> <marcandre.lureau@redhat.com>; Paolo Bonzini <pbonzini@redhat.com>;
> Edgar Iglesias <edgari@xilinx.com>; Francisco Eduardo Iglesias
> <figlesia@xilinx.com>; qemu-devel@nongnu.org; Alistair Francis
> <alistair.francis@wdc.com>; Eduardo Habkost <ehabkost@redhat.com>;
> Ying Fang <fangying1@huawei.com>; 'Philippe Mathieu-Daudé'
> <philmd@redhat.com>; Vikram Garhwal <fnuv@xilinx.com>; Paul
> Zimmerman <pauldzim@gmail.com>
> Subject: Re: [PATCH v4 6/7] usb: Add DWC3 model
> 
> On Sat, Aug 29, 2020 at 12:49:39AM +0530, Sai Pavan Boddu wrote:
> > From: Vikram Garhwal <fnu.vikram@xilinx.com>
> >
> > This patch adds skeleton model of dwc3 usb controller attached to
> > xhci-sysbus device.
> 
> --verbose.
> 
> This looks like xhci with a bunch of extra registers?
[Sai Pavan Boddu] 
> What these registers are good for?
These are also put to make the guest happy.
This module contain dwc3 global registers which deal with power management, phy 
config and ID registers.
And also has Device and OTG registers which are incomplete at present.

What I realized is, we could clean many of these registers and only emulate ID 
registers at present. As others are meaningless. I would just define a reserved 
space, to skip io access errors.

Thanks,
Sai Pavan
> 
> > +/*
> > + * QEMU model of the USB DWC3 host controller emulation.
> 
> (answer should go to both this comment and the commit message).
> 
> thanks,
>   Gerd