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Re: [PATCH 2/2] target/arm: Remove no-longer-reachable 32-bit KVM code
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [PATCH 2/2] target/arm: Remove no-longer-reachable 32-bit KVM code |
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Date: |
Fri, 4 Sep 2020 18:01:34 +0200 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 |
On 9/4/20 5:41 PM, Peter Maydell wrote:
> Now that 32-bit KVM host support is gone, KVM can never
> be enabled unless CONFIG_AARCH64 is true, and some code
> paths are no longer reachable and can be deleted.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
[...]
> static void arm_max_initfn(Object *obj)
> {
> ARMCPU *cpu = ARM_CPU(obj);
>
> - if (kvm_enabled()) {
> - kvm_arm_set_cpu_features_from_host(cpu);
> - } else {
> - cortex_a15_initfn(obj);
> + cortex_a15_initfn(obj);
>
> - /* old-style VFP short-vector support */
> - cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
> + /* old-style VFP short-vector support */
> + cpu->isar.mvfr0 = FIELD_DP32(cpu->isar.mvfr0, MVFR0, FPSHVEC, 1);
>
> #ifdef CONFIG_USER_ONLY
> - /* We don't set these in system emulation mode for the moment,
> - * since we don't correctly set (all of) the ID registers to
> - * advertise them.
> - */
> - set_feature(&cpu->env, ARM_FEATURE_V8);
> - {
> - uint32_t t;
> + /* We don't set these in system emulation mode for the moment,
checkpatch might warn "block comment ... separate line" :/
> + * since we don't correctly set (all of) the ID registers to
> + * advertise them.
> + */
> + set_feature(&cpu->env, ARM_FEATURE_V8);
> + {
> + uint32_t t;
>
> - t = cpu->isar.id_isar5;
> - t = FIELD_DP32(t, ID_ISAR5, AES, 2);
> - t = FIELD_DP32(t, ID_ISAR5, SHA1, 1);
> - t = FIELD_DP32(t, ID_ISAR5, SHA2, 1);
> - t = FIELD_DP32(t, ID_ISAR5, CRC32, 1);
> - t = FIELD_DP32(t, ID_ISAR5, RDM, 1);
> - t = FIELD_DP32(t, ID_ISAR5, VCMA, 1);
> - cpu->isar.id_isar5 = t;
> + t = cpu->isar.id_isar5;
> + t = FIELD_DP32(t, ID_ISAR5, AES, 2);
> + t = FIELD_DP32(t, ID_ISAR5, SHA1, 1);
> + t = FIELD_DP32(t, ID_ISAR5, SHA2, 1);
> + t = FIELD_DP32(t, ID_ISAR5, CRC32, 1);
> + t = FIELD_DP32(t, ID_ISAR5, RDM, 1);
> + t = FIELD_DP32(t, ID_ISAR5, VCMA, 1);
> + cpu->isar.id_isar5 = t;
>
> - t = cpu->isar.id_isar6;
> - t = FIELD_DP32(t, ID_ISAR6, JSCVT, 1);
> - t = FIELD_DP32(t, ID_ISAR6, DP, 1);
> - t = FIELD_DP32(t, ID_ISAR6, FHM, 1);
> - t = FIELD_DP32(t, ID_ISAR6, SB, 1);
> - t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
> - cpu->isar.id_isar6 = t;
> + t = cpu->isar.id_isar6;
> + t = FIELD_DP32(t, ID_ISAR6, JSCVT, 1);
> + t = FIELD_DP32(t, ID_ISAR6, DP, 1);
> + t = FIELD_DP32(t, ID_ISAR6, FHM, 1);
> + t = FIELD_DP32(t, ID_ISAR6, SB, 1);
> + t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
> + cpu->isar.id_isar6 = t;
>
> - t = cpu->isar.mvfr1;
> - t = FIELD_DP32(t, MVFR1, FPHP, 3); /* v8.2-FP16 */
> - t = FIELD_DP32(t, MVFR1, SIMDHP, 2); /* v8.2-FP16 */
> - cpu->isar.mvfr1 = t;
> + t = cpu->isar.mvfr1;
> + t = FIELD_DP32(t, MVFR1, FPHP, 3); /* v8.2-FP16 */
> + t = FIELD_DP32(t, MVFR1, SIMDHP, 2); /* v8.2-FP16 */
> + cpu->isar.mvfr1 = t;
>
> - t = cpu->isar.mvfr2;
> - t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
> - t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */
> - cpu->isar.mvfr2 = t;
> + t = cpu->isar.mvfr2;
> + t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
> + t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */
> + cpu->isar.mvfr2 = t;
>
> - t = cpu->isar.id_mmfr3;
> - t = FIELD_DP32(t, ID_MMFR3, PAN, 2); /* ATS1E1 */
> - cpu->isar.id_mmfr3 = t;
> + t = cpu->isar.id_mmfr3;
> + t = FIELD_DP32(t, ID_MMFR3, PAN, 2); /* ATS1E1 */
> + cpu->isar.id_mmfr3 = t;
>
> - t = cpu->isar.id_mmfr4;
> - t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
> - t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
> - t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */
> - t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* TTS2UXN */
> - cpu->isar.id_mmfr4 = t;
> - }
> -#endif
> + t = cpu->isar.id_mmfr4;
> + t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
> + t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
> + t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */
> + t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* TTS2UXN */
> + cpu->isar.id_mmfr4 = t;
> }
> +#endif
Scary :) This is the if {} else {} removed, OK.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> }
> #endif
>
> @@ -2269,11 +2265,7 @@ static void arm_host_initfn(Object *obj)
>
> static const TypeInfo host_arm_cpu_type_info = {
> .name = TYPE_ARM_HOST_CPU,
> -#ifdef TARGET_AARCH64
> .parent = TYPE_AARCH64_CPU,
> -#else
> - .parent = TYPE_ARM_CPU,
> -#endif
> .instance_init = arm_host_initfn,
> };
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