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Re: [PATCH] hw/block/nand: Decommission the NAND museum


From: Richard Henderson
Subject: Re: [PATCH] hw/block/nand: Decommission the NAND museum
Date: Fri, 11 Sep 2020 16:13:17 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 9/6/20 7:46 PM, Philippe Mathieu-Daudé wrote:
> ping^2
> 
> On 8/22/20 10:03 PM, Philippe Mathieu-Daudé wrote:
>> ping?
>>
>> On 8/14/20 3:23 PM, Philippe Mathieu-Daudé wrote:
>>> I forgot to Cc qemu-arm@, doing it now since most of the users
>>> of this are ARM machines.
>>>
>>> On 8/14/20 3:21 PM, Philippe Mathieu-Daudé wrote:
>>>> This is the QEMU equivalent of this Linux commit (but 7 years later):
>>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f7025a43a9da2
>>>>
>>>>     The MTD subsystem has its own small museum of ancient NANDs
>>>>     in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option.
>>>>     The museum contains stone age NANDs with 256 bytes pages, as well
>>>>     as iron age NANDs with 512 bytes per page and up to 8MiB page size.
>>>>
>>>>     It is with great sorrow that I inform you that the museum is being
>>>>     decommissioned. The MTD subsystem is out of budget for Kconfig
>>>>     options and already has too many of them, and there is a general
>>>>     kernel trend to simplify the configuration menu.
>>>>
>>>>     We remove the stone age exhibits along with closing the museum,
>>>>     but some of the iron age ones are transferred to the regular NAND
>>>>     depot. Namely, only those which have unique device IDs are
>>>>     transferred, and the ones which have conflicting device IDs are
>>>>     removed.
>>>>
>>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


>>>> ---
>>>>  hw/block/nand.c | 13 ++++++-------
>>>>  1 file changed, 6 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/hw/block/nand.c b/hw/block/nand.c
>>>> index 654e0cb5d1..7d7ccc9aa4 100644
>>>> --- a/hw/block/nand.c
>>>> +++ b/hw/block/nand.c
>>>> @@ -137,7 +137,7 @@ static void mem_and(uint8_t *dest, const uint8_t *src, 
>>>> size_t n)
>>>>  # define ADDR_SHIFT               16
>>>>  # include "nand.c"
>>>>  
>>>> -/* Information based on Linux drivers/mtd/nand/nand_ids.c */
>>>> +/* Information based on Linux drivers/mtd/nand/raw/nand_ids.c */
>>>>  static const struct {
>>>>      int size;
>>>>      int width;
>>>> @@ -153,15 +153,14 @@ static const struct {
>>>>      [0xe8] = { 1, 8,      8, 4, 0 },
>>>>      [0xec] = { 1, 8,      8, 4, 0 },
>>>>      [0xea] = { 2, 8,      8, 4, 0 },
>>>> -    [0xd5] = { 4, 8,      9, 4, 0 },
>>>>      [0xe3] = { 4, 8,      9, 4, 0 },
>>>>      [0xe5] = { 4, 8,      9, 4, 0 },
>>>> -    [0xd6] = { 8, 8,      9, 4, 0 },
>>>>  
>>>> -    [0x39] = { 8, 8,      9, 4, 0 },
>>>> -    [0xe6] = { 8, 8,      9, 4, 0 },
>>>> -    [0x49] = { 8, 16,     9, 4, NAND_BUSWIDTH_16 },
>>>> -    [0x59] = { 8, 16,     9, 4, NAND_BUSWIDTH_16 },
>>>> +    [0x6b] = { 4,        8,        9, 4, 0 },
>>>> +    [0xe3] = { 4,        8,        9, 4, 0 },
>>>> +    [0xe5] = { 4,        8,        9, 4, 0 },
>>>> +    [0xd6] = { 8,        8,        9, 4, 0 },
>>>> +    [0xe6] = { 8,        8,        9, 4, 0 },
>>>>  
>>>>      [0x33] = { 16,        8,      9, 5, 0 },
>>>>      [0x73] = { 16,        8,      9, 5, 0 },
>>>>
>>>
>>
> 




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