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[RFC PATCH 11/12] hw/acpi/aml-build: build ACPI CPU cache topology infor
From: |
Ying Fang |
Subject: |
[RFC PATCH 11/12] hw/acpi/aml-build: build ACPI CPU cache topology information |
Date: |
Thu, 17 Sep 2020 11:20:32 +0800 |
To build cache information, An AcpiCacheInfo structure is defined to
hold the Type 1 cache structure according to ACPI spec v6.3 5.2.29.2.
A helper function build_cache_hierarchy is introduced to encode the
cache information.
Signed-off-by: Ying Fang <fangying1@huawei.com>
---
hw/acpi/aml-build.c | 26 ++++++++++++++++++++++++++
include/hw/acpi/acpi-defs.h | 8 ++++++++
include/hw/acpi/aml-build.h | 3 +++
3 files changed, 37 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 13eb6e1345..123eb032cd 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1754,6 +1754,32 @@ void build_slit(GArray *table_data, BIOSLinker *linker,
MachineState *ms)
table_data->len - slit_start, 1, NULL, NULL);
}
+/* ACPI 6.3: 5.29.2 Cache type structure (Type 1) */
+static void build_cache_head(GArray *tbl, uint32_t next_level)
+{
+ build_append_byte(tbl, 1);
+ build_append_byte(tbl, 24);
+ build_append_int_noprefix(tbl, 0, 2);
+ build_append_int_noprefix(tbl, 0x7f, 4);
+ build_append_int_noprefix(tbl, next_level, 4);
+}
+
+static void build_cache_tail(GArray *tbl, AcpiCacheInfo *cache_info)
+{
+ build_append_int_noprefix(tbl, cache_info->size, 4);
+ build_append_int_noprefix(tbl, cache_info->sets, 4);
+ build_append_byte(tbl, cache_info->associativity);
+ build_append_byte(tbl, cache_info->attributes);
+ build_append_int_noprefix(tbl, cache_info->line_size, 2);
+}
+
+void build_cache_hierarchy(GArray *tbl,
+ uint32_t next_level, AcpiCacheInfo *cache_info)
+{
+ build_cache_head(tbl, next_level);
+ build_cache_tail(tbl, cache_info);
+}
+
/*
* ACPI 6.3: 5.2.29.1 Processor hierarchy node structure (Type 0)
*/
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index 38a42f409a..3df38ab449 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -618,4 +618,12 @@ struct AcpiIortRC {
} QEMU_PACKED;
typedef struct AcpiIortRC AcpiIortRC;
+typedef struct AcpiCacheInfo {
+ uint32_t size;
+ uint32_t sets;
+ uint8_t associativity;
+ uint8_t attributes;
+ uint16_t line_size;
+} AcpiCacheInfo;
+
#endif
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index ff4c6a38f3..ced1ae6a83 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -435,6 +435,9 @@ void build_srat_memory(AcpiSratMemoryAffinity *numamem,
uint64_t base,
void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms);
+void build_cache_hierarchy(GArray *tbl,
+ uint32_t next_level, AcpiCacheInfo *cache_info);
+
void build_socket_hierarchy(GArray *tbl, uint32_t parent, uint32_t id);
void build_processor_hierarchy(GArray *tbl, uint32_t flags,
--
2.23.0
- [RFC PATCH 07/12] hw/acpi/aml-build: add processor hierarchy node structure, (continued)
- [RFC PATCH 07/12] hw/acpi/aml-build: add processor hierarchy node structure, Ying Fang, 2020/09/16
- [RFC PATCH 06/12] hw/arm/virt-acpi-build: distinguish possible and present cpus, Ying Fang, 2020/09/16
- [RFC PATCH 08/12] hw/arm/virt-acpi-build: add PPTT table, Ying Fang, 2020/09/16
- [RFC PATCH 12/12] hw/arm/virt-acpi-build: Enable CPU cache topology, Ying Fang, 2020/09/16
- [RFC PATCH 10/12] hw/arm/virt: add fdt cache information, Ying Fang, 2020/09/16
- [RFC PATCH 11/12] hw/acpi/aml-build: build ACPI CPU cache topology information,
Ying Fang <=