Re: [PATCH v1 5/8] s390x/tcg: Implement BRANCH INDIRECT ON CONDITION (BIC)

[Richard Henderson]

On 9/22/20 3:31 AM, David Hildenbrand wrote:
> +/* BRANCH INDIRECT ON CONDITION */
> +    C(0xe347, BIC,     RXY_b, MIE2,0, m2_64, 0, 0, bc, 0)
>  /* BRANCH ON CONDITION */
>      C(0x0700, BCR,     RR_b,  Z,   0, r2_nz, 0, 0, bc, 0)
>      C(0x4700, BC,      RX_b,  Z,   0, a2, 0, 0, bc, 0)
> diff --git a/target/s390x/translate.c b/target/s390x/translate.c
> index b536491892..383edf7419 100644
> --- a/target/s390x/translate.c
> +++ b/target/s390x/translate.c
> @@ -1626,6 +1626,11 @@ static DisasJumpType op_bc(DisasContext *s, DisasOps 
> *o)
>          return DISAS_NEXT;
>      }
>  
> +    /* For BIC the address came from memory, we need to wrap it again. */
> +    if (s->fields.op2 == 0x47) {
> +        gen_addi_and_wrap_i64(s, o->in2, o->in2, 0);
> +    }

I'm not keen on this sort of per-opcode checks.

I'd prefer to add an in2_m2_64w() helper that performs the load and then wraps.


r~