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[PATCH 3/3] target/mips: Explicit Release 6 MMU types
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 3/3] target/mips: Explicit Release 6 MMU types |
Date: |
Tue, 1 Dec 2020 14:28:17 +0100 |
As of Release 6, MMU type 4 is assigned to "Dual Variable-Page-Size
and Fixed-Page-Size TLBs" and type 2 to "Block Address Translation.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/internal.h | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index dd8a7809b64..d290c1afe30 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -15,10 +15,11 @@
* CP0C0_MT field.
*/
enum mips_mmu_types {
- MMU_TYPE_NONE,
- MMU_TYPE_R4000,
- MMU_TYPE_RESERVED,
- MMU_TYPE_FMT,
+ MMU_TYPE_NONE = 0,
+ MMU_TYPE_R4000 = 1, /* Standard TLB */
+ MMU_TYPE_BAT = 2, /* Block Address Translation */
+ MMU_TYPE_FMT = 3, /* Fixed Mapping */
+ MMU_TYPE_DVF = 4, /* Dual VTLB and FTLB */
MMU_TYPE_R3000,
MMU_TYPE_R6000,
MMU_TYPE_R8000
--
2.26.2