[PATCH 06/13] target/mips: Convert Rel6 Special2 opcode to decodetree

[Philippe Mathieu-Daudé]

Special2 opcode have been removed from the Release 6.
Add a single decodetree entry for all the opcode class,
triggering Reserved Instruction if ever used.

Remove unreachable check_insn_opc_removed() call.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/isa-mips32r6.decode       | 2 ++
 target/mips/isa-mips_rel6_translate.c | 7 +++++++
 target/mips/translate.c               | 2 --
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/target/mips/isa-mips32r6.decode b/target/mips/isa-mips32r6.decode
index 027585ee042..259bac612ab 100644
--- a/target/mips/isa-mips32r6.decode
+++ b/target/mips/isa-mips32r6.decode
@@ -15,3 +15,5 @@
 @lsa                ...... rs:5 rt:5 rd:5 ... sa:2 ......   &lsa
 
 LSA                 000000 ..... ..... ..... 000 .. 000101  @lsa
+
+REMOVED             011100 ----- ----- ----- ----- ------   # SPECIAL2
diff --git a/target/mips/isa-mips_rel6_translate.c 
b/target/mips/isa-mips_rel6_translate.c
index c77f3ed57e0..9ac906b1f33 100644
--- a/target/mips/isa-mips_rel6_translate.c
+++ b/target/mips/isa-mips_rel6_translate.c
@@ -20,6 +20,13 @@
 #include "decode-isa-mips64r6.c.inc"
 #endif /* TARGET_MIPS64 */
 
+bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
+{
+    gen_reserved_instruction(ctx);
+
+    return true;
+}
+
 static bool trans_LSA(DisasContext *ctx, arg_LSA *a)
 {
     return gen_LSA(ctx, a->rd, a->rt, a->rs, a->sa);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 8f0a0a3830c..788b5112a80 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -27145,8 +27145,6 @@ static void decode_opc_special2_legacy(CPUMIPSState 
*env, DisasContext *ctx)
     int rs, rt, rd;
     uint32_t op1;
 
-    check_insn_opc_removed(ctx, ISA_MIPS32R6);
-
     rs = (ctx->opcode >> 21) & 0x1f;
     rt = (ctx->opcode >> 16) & 0x1f;
     rd = (ctx->opcode >> 11) & 0x1f;
-- 
2.26.2