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Re: [RFC v9 27/32] accel: replace struct CpusAccel with AccelOpsClass
From: |
Alex Bennée |
Subject: |
Re: [RFC v9 27/32] accel: replace struct CpusAccel with AccelOpsClass |
Date: |
Wed, 09 Dec 2020 18:30:30 +0000 |
User-agent: |
mu4e 1.5.7; emacs 28.0.50 |
Claudio Fontana <cfontana@suse.de> writes:
> On 12/9/20 1:54 PM, Alex Bennée wrote:
>>
>> Claudio Fontana <cfontana@suse.de> writes:
>>
>>> centralize the registration of the cpus.c module
>>> accelerator operations in accel/accel-softmmu.c
>>>
>>> Signed-off-by: Claudio Fontana <cfontana@suse.de>
>> <snip>
>>> diff --git a/accel/tcg/tcg-cpus.c b/accel/tcg/tcg-cpus.c
>>> index e335f9f155..38a58ab271 100644
>>> --- a/accel/tcg/tcg-cpus.c
>>> +++ b/accel/tcg/tcg-cpus.c
>>> @@ -35,6 +35,9 @@
>>> #include "hw/boards.h"
>>>
>>> #include "tcg-cpus.h"
>>> +#include "tcg-cpus-mttcg.h"
>>> +#include "tcg-cpus-rr.h"
>>> +#include "tcg-cpus-icount.h"
>>>
>>> /* common functionality among all TCG variants */
>>>
>>> @@ -80,3 +83,43 @@ void tcg_cpus_handle_interrupt(CPUState *cpu, int mask)
>>> qatomic_set(&cpu_neg(cpu)->icount_decr.u16.high, -1);
>>> }
>>> }
>>> +
>>> +static void tcg_cpus_ops_init(AccelOpsClass *ops)
>>> +{
>>> + if (qemu_tcg_mttcg_enabled()) {
>>> + ops->create_vcpu_thread = mttcg_start_vcpu_thread;
>>> + ops->kick_vcpu_thread = mttcg_kick_vcpu_thread;
>>> + ops->handle_interrupt = tcg_cpus_handle_interrupt;
>>> +
>>> + } else if (icount_enabled()) {
>>> + ops->create_vcpu_thread = rr_start_vcpu_thread;
>>> + ops->kick_vcpu_thread = rr_kick_vcpu_thread;
>>> + ops->handle_interrupt = icount_handle_interrupt;
>>> + ops->get_virtual_clock = icount_get;
>>> + ops->get_elapsed_ticks = icount_get;
>>> +
>>> + } else {
>>> + ops->create_vcpu_thread = rr_start_vcpu_thread;
>>> + ops->kick_vcpu_thread = rr_kick_vcpu_thread;
>>> + ops->handle_interrupt = tcg_cpus_handle_interrupt;
>>> + }
>>> +}
>>
>> Aren't we going backwards here by having a global function aware of the
>> different accelerator types rather than encapsulating this is the
>> particular accelerator machinery?
>>
>> <snip>
>>
>
> Now I got your point.
>
> The ideal would be to have three classes. One called tcg-mttcg, one
> tcg-icount, one tcg-rr.
> The problem: backward compatibility I think, since currently we have only one
> accel, "tcg".
>
> But, hmm maybe fixable, I'll take a look.
Yeah I was wondering if we were going to have subclasses for each "type"
of TCG. But now I'm wondering if that even makes sense. Will we ever
want to built a TCG enabled binary that say doesn't do icount? Maybe
not - having a single AccelOpsClass which runs in 3 modes will probably
do for now.
>
> Thanks!
>
> Claudio
--
Alex Bennée
- Re: [RFC v9 21/32] cpu: Move debug_excp_handler to tcg_ops, (continued)
[RFC v9 30/32] cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn, Claudio Fontana, 2020/12/08
[RFC v9 25/32] cpu: move do_unaligned_access to tcg_ops, Claudio Fontana, 2020/12/08
[RFC v9 29/32] i386: split cpu accelerators from cpu.c, using AccelCPUClass, Claudio Fontana, 2020/12/08
[RFC v9 28/32] accel: introduce AccelCPUClass extending CPUClass, Claudio Fontana, 2020/12/08
[RFC v9 32/32] cpu: introduce cpu_accel_instance_init, Claudio Fontana, 2020/12/08
[RFC v9 31/32] hw/core/cpu: call qemu_init_vcpu in cpu_common_realizefn, Claudio Fontana, 2020/12/08
Re: [RFC v9 00/22] i386 cleanup, Philippe Mathieu-Daudé, 2020/12/08