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Re: [PATCH 26/26] MAINTAINERS: Add entry for MIPS Toshiba TCG
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH 26/26] MAINTAINERS: Add entry for MIPS Toshiba TCG |
Date: |
Sun, 13 Dec 2020 16:23:23 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.5.0 |
Hi Fredrik,
On 12/12/20 5:04 PM, Fredrik Noring wrote:
> On Fri, Nov 20, 2020 at 10:08:44PM +0100, Philippe Mathieu-Daudé wrote:
>> Add an entry for the TCG core related to Toshiba TXx9.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> Adding Fredrik Noring in case he wants to be notified of changes,
>> patch conditional to his approval.
>
> I may be able to help on the TX79 that is an R5900, but unless commit
> 823f2897bdd7 ("target/mips: Disable R5900 support") is reverted, it
> remains shut off in QEMU. To obtain n32, in addition to o32, one may
> want to apply something similar to this:
I added o32 because these are the only binaries I could find to test
the CPU you added. Are there n32 binaries easily available?
I noticed GCC merged your patch, and Gentoo too. It should be enough
to respin the Docker image to cross-compile and test the TCG tests
you already added:
8e2e5e7daca tests/tcg: mips: Test R5900 three-operand MADDU
84dc0712361 tests/tcg: mips: Test R5900 three-operand MADD1
50f299da629 tests/tcg: mips: Test R5900 three-operand MADD
35eb9be6bb6 tests/tcg/mips: Add tests for R5900 DIVU1
990aa328be4 tests/tcg/mips: Add tests for R5900 DIV1
4d261a6a595 tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1
3303f017adb tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1
bec4d66b248 tests/tcg/mips: Add tests for R5900 three-operand MULTU1
cb56125eea7 tests/tcg/mips: Add tests for R5900 three-operand MULT1
667eded2702 tests/tcg/mips: Add tests for R5900 three-operand MULTU
>
> diff --git a/linux-user/mips64/target_elf.h b/linux-user/mips64/target_elf.h
> index ec55d8542a..5f2f2df29f 100644
> --- a/linux-user/mips64/target_elf.h
> +++ b/linux-user/mips64/target_elf.h
> @@ -12,6 +12,9 @@ static inline const char *cpu_get_model(uint32_t eflags)
> if ((eflags & EF_MIPS_ARCH) == EF_MIPS_ARCH_64R6) {
> return "I6400";
> }
> + if ((eflags & EF_MIPS_MACH) == EF_MIPS_MACH_5900) {
> + return "R5900";
> + }
> return "5KEf";
> }
> #endif
>
>> ---
>> MAINTAINERS | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index b6d98b95c47..d97f0f1d66e 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -253,6 +253,12 @@ R: Craig Janeczek <jancraig@amazon.com>
>> S: Odd Fixes
>> F: target/mips/vendor-xburst*
>>
>> +MIPS TCG CPUs (Toshiba TX)
>> +M: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> +R: Fredrik Noring <noring@nocrew.org>
>> +S: Odd Fixes
>> +F: target/mips/vendor-tx*
BTW I should also include here:
F: tests/tcg/mips/user/isa/r5900/
Regards,
Phil.